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[Autobackout][FunctionalRegression]Revert of change: 3a468ec: Emit null register sources for typed lsc operations in VC
When the typed lsc messages have some of the texture coordinates being equal to zero, the register sources for such coordinates can be omitted to reduce the register pressure.
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+2
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IGC/VectorCompiler/lib/GenXCodeGen/GenXPatternMatch.cpp

Lines changed: 2 additions & 36 deletions
Original file line numberDiff line numberDiff line change
@@ -202,7 +202,6 @@ class GenXPatternMatch : public FunctionPass,
202202
bool simplifyCmp(CmpInst *Cmp);
203203
CmpInst *reduceCmpWidth(CmpInst *Cmp);
204204
bool simplifyNullDst(CallInst *Inst);
205-
bool simplifyNullSrc(CallInst *Inst);
206205
bool simplifyDpasNullSrc(CallInst *Inst);
207206
// Transform logic operation with a mask from <N x iM> to <N/(32/M) x i32>
208207
bool extendMask(BinaryOperator *BO);
@@ -820,7 +819,7 @@ void GenXPatternMatch::visitBinaryOperator(BinaryOperator &I) {
820819
}
821820

822821
void GenXPatternMatch::visitCallInst(CallInst &I) {
823-
if (I.use_empty() && !I.getType()->isVoidTy())
822+
if (I.use_empty())
824823
return;
825824

826825
auto IID = vc::getAnyIntrinsicID(&I);
@@ -865,15 +864,6 @@ void GenXPatternMatch::visitCallInst(CallInst &I) {
865864
case GenXIntrinsic::genx_uutrunc_sat:
866865
Changed |= simplifyTruncSat(&I);
867866
break;
868-
869-
case vc::InternalIntrinsic::lsc_load_quad_tgm:
870-
Changed |= simplifyNullDst(&I);
871-
LLVM_FALLTHROUGH;
872-
case vc::InternalIntrinsic::lsc_prefetch_quad_tgm:
873-
case vc::InternalIntrinsic::lsc_store_quad_tgm:
874-
Changed |= simplifyNullSrc(&I);
875-
break;
876-
877867
case vc::InternalIntrinsic::lsc_atomic_ugm:
878868
case vc::InternalIntrinsic::lsc_load_ugm:
879869
case vc::InternalIntrinsic::lsc_load_quad_ugm:
@@ -893,6 +883,7 @@ void GenXPatternMatch::visitCallInst(CallInst &I) {
893883
case vc::InternalIntrinsic::lsc_load_quad_slm:
894884
case vc::InternalIntrinsic::lsc_store_slm:
895885
case vc::InternalIntrinsic::lsc_store_quad_slm:
886+
case vc::InternalIntrinsic::lsc_load_quad_tgm:
896887
case GenXIntrinsic::genx_dword_atomic_fadd:
897888
case GenXIntrinsic::genx_dword_atomic_fsub:
898889
case GenXIntrinsic::genx_dword_atomic_add:
@@ -4294,31 +4285,6 @@ bool GenXPatternMatch::simplifyNullDst(CallInst *Inst) {
42944285
return false;
42954286
}
42964287

4297-
bool GenXPatternMatch::simplifyNullSrc(CallInst *Inst) {
4298-
if (!vc::InternalIntrinsic::isInternalMemoryIntrinsic(Inst))
4299-
return false;
4300-
4301-
bool Changed = false;
4302-
4303-
auto IID = vc::getAnyIntrinsicID(Inst);
4304-
GenXIntrinsicInfo Info(IID);
4305-
4306-
for (unsigned I = 0; I < Inst->arg_size(); ++I) {
4307-
auto *Arg = dyn_cast<Constant>(Inst->getArgOperand(I));
4308-
if (!Arg || !Arg->isNullValue())
4309-
continue;
4310-
4311-
auto ArgInfo = Info.getArgInfo(I);
4312-
if (!ArgInfo.isRaw() || !ArgInfo.isNullAllowed())
4313-
continue;
4314-
4315-
Inst->setArgOperand(I, UndefValue::get(Arg->getType()));
4316-
Changed = true;
4317-
}
4318-
4319-
return Changed;
4320-
}
4321-
43224288
bool GenXPatternMatch::simplifyDpasNullSrc(CallInst *Inst) {
43234289
if (ST->hasFusedEU())
43244290
return false;

IGC/VectorCompiler/test/PatternMatch/tgm-null-src.ll

Lines changed: 0 additions & 26 deletions
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