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Commit 945236a

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fangliu2020igcbot
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Add TGM fence workaround for Xe2
Add TGM fence workaround for Xe2 which needs to double every TMG fence instruction if fence flush type is not NONE.
1 parent 69efb32 commit 945236a

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6 files changed

+31
-0
lines changed

6 files changed

+31
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lines changed

inc/common/sku_wa_defs.h

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Original file line numberDiff line numberDiff line change
@@ -651,3 +651,9 @@ SPDX-License-Identifier: MIT
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WA_BUG_TYPE_UNKNOWN,
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WA_BUG_PERF_IMPACT_UNKNOWN, WA_COMPONENT_UNKNOWN)
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WA_DECLARE(
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Wa_14021891663,
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"Workaround",
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WA_BUG_TYPE_UNKNOWN,
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WA_BUG_PERF_IMPACT_UNKNOWN, WA_COMPONENT_UNKNOWN)
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visa/G4_SendDescs.cpp

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@@ -700,6 +700,12 @@ LSC_DATA_ORDER G4_SendDescRaw::getLscDataOrder() const {
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}
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}
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LSC_FENCE_OP G4_SendDescRaw::getLscFenceOp() const {
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vISA_ASSERT(isLscOp(), "must be LSC op");
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vISA_ASSERT(isFence(), "must be fence op");
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return static_cast<LSC_FENCE_OP>((desc.value >> 12) & 0x7);
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}
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int G4_SendDescRaw::getLscImmOff() const {
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vISA_ASSERT(isLscOp(), "must be LSC op");
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if (getSFID() == SFID::TGM)

visa/G4_SendDescs.hpp

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Original file line numberDiff line numberDiff line change
@@ -508,6 +508,7 @@ class G4_SendDescRaw : public G4_SendDesc {
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LSC_ADDR_TYPE getLscAddrType() const;
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int getLscAddrSizeBytes() const; // e.g. a64 => 8
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LSC_DATA_ORDER getLscDataOrder() const;
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LSC_FENCE_OP getLscFenceOp() const;
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int getLscImmOff() const;
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void setLscImmOff(int off);

visa/HWCaps.inc

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Original file line numberDiff line numberDiff line change
@@ -893,4 +893,9 @@ uint32_t getSizeOfSendQueue() const {
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bool hasImmOnSrc0Src2ForAlign1Ternary() const {
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return getPlatformGeneration() >= PlatformGen::XE;
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}
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bool needTGMDoubleFenceWA() const {
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return VISA_WA_CHECK(getPWaTable(), Wa_14021891663) &&
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getOption(vISA_TGMDoubleFenceWA);
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}
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// end HW capabilities

visa/SWWA.cpp

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Original file line numberDiff line numberDiff line change
@@ -3906,6 +3906,15 @@ void Optimizer::HWWorkaround() {
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if (inst->isIEEEExceptionTrap())
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expandIEEEExceptionTrap(ii, bb);
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// Double up every TGM fence instruction if fenceOp is not
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// LSC_FENCE_OP_NONE
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if (builder.needTGMDoubleFenceWA() && inst->isSend() &&
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inst->asSendInst()->isFence() &&
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inst->asSendInst()->getMsgDesc()->getSFID() == SFID::TGM &&
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inst->asSendInst()->getMsgDescRaw()->getLscFenceOp() !=
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LSC_FENCE_OP_NONE)
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bb->insertBefore(ii, inst->cloneInst());
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ii++;
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}
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}

visa/include/VISAOptionsDefs.h

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Original file line numberDiff line numberDiff line change
@@ -741,6 +741,10 @@ DEF_VISA_OPTION(vISA_noIndirectSrcForCompressedInstWA, ET_BOOL,
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"Disable WA for fixing compressed instructions with indirect "
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"src0 and cross-grf dst",
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false)
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DEF_VISA_OPTION(vISA_TGMDoubleFenceWA, ET_BOOL, "-tgmDoubleFenceWA",
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"enable the WA to double any TGM fence instruction with "
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"flush-type is not FLUSH_NONE",
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false)
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//=== HW debugging options ===
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DEF_VISA_OPTION(vISA_GenerateDebugInfo, ET_BOOL, "-generateDebugInfo", UNUSED,

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