VC backed can lower lzd64

Author: aparshin-intel

IGC/VectorCompiler/lib/GenXCodeGen/GenXLowering.cpp

@@ -198,6 +198,7 @@ class GenXLowering : public FunctionPass {
   bool lowerLoadStore(Instruction *Inst);
   bool lowerMulSat(CallInst *CI, unsigned IntrinsicID);
   bool lowerMul64(Instruction *Inst);
+  bool lowerLzd(Instruction *Inst);
   bool lowerTrap(CallInst *CI);
   bool generatePredicatedWrrForNewLoad(CallInst *CI);
 };
@@ -1135,6 +1136,8 @@ bool GenXLowering::processInst(Instruction *Inst) {
     case GenXIntrinsic::genx_usmul_sat:
     case GenXIntrinsic::genx_uumul_sat:
       return lowerMulSat(CI, IntrinsicID);
+    case GenXIntrinsic::genx_lzd:
+      return lowerLzd(Inst);
     case Intrinsic::trap:
       return lowerTrap(CI);
     case Intrinsic::ctpop:
@@ -2568,7 +2571,6 @@ bool GenXLowering::lowerMul64(Instruction *Inst) {
     return false;
 
   IRBuilder<> Builder(Inst);
-  Builder.SetCurrentDebugLocation(Inst->getDebugLoc());
 
   auto Src0 = SplitBuilder.splitOperandLoHi(0);
   auto Src1 = SplitBuilder.splitOperandLoHi(1);
@@ -2596,6 +2598,38 @@ bool GenXLowering::lowerMul64(Instruction *Inst) {
   ToErase.push_back(Inst);
   return true;
 }
+bool GenXLowering::lowerLzd(Instruction *Inst) {
+  const unsigned OpIndex = 0;
+  IVSplitter SplitBuilder(*Inst, &OpIndex);
+  if (!SplitBuilder.IsI64Operation())
+    return false;
+
+  IRBuilder<> Builder(Inst);
+
+  auto Src = SplitBuilder.splitOperandLoHi(0);
+
+  auto *VTy32 = cast<VectorType>(Src.Lo->getType());
+  IGC_ASSERT(VTy32->getScalarType() == Builder.getInt32Ty());
+  auto *Zero = ConstantInt::getNullValue(VTy32);
+  auto *K32 = ConstantInt::get(VTy32, 32);
+
+  auto *LzdF = GenXIntrinsic::getAnyDeclaration(
+      Inst->getModule(), GenXIntrinsic::genx_lzd, {Src.Lo->getType()});
+
+  // Lzd64 is lowered as:
+  // LoLzd  = lzd(Src.Lo)
+  // HiLzd  = lzd(Src.Hi)
+  // Result = (Src.Hi == 0) ? (LoLzd + 32) : HiLzd
+  auto *VlzdLo = Builder.CreateCall(LzdF, Src.Lo, "lower.lzd64.lo.");
+  auto *VlzdHi = Builder.CreateCall(LzdF, Src.Hi, "lower.lzd64.hi.");
+  auto *FlagHiZero = Builder.CreateICmpEQ(Src.Hi, Zero, "lower.lzd64.hicmp.");
+  auto *LoPathResult = Builder.CreateAdd(VlzdLo, K32, "lower.lzd64.lores.");
+  auto *Result =
+      Builder.CreateSelect(FlagHiZero, LoPathResult, VlzdHi, "lower.lzd64.");
+  Inst->replaceAllUsesWith(Result);
+  ToErase.push_back(Inst);
+  return true;
+}
 /***********************************************************************
  * widenByteOp : widen a vector byte operation to short if that might
  *               improve code

IGC/VectorCompiler/lib/GenXCodeGen/GenXUtil.cpp

@@ -1037,8 +1037,8 @@ unsigned ShuffleVectorAnalyzer::getSerializeCost(unsigned i) {
   return Cost;
 }
 
-
-IVSplitter::IVSplitter(Instruction &Inst, unsigned* BaseOpIdx) : Inst(Inst) {
+IVSplitter::IVSplitter(Instruction &Inst, const unsigned *BaseOpIdx)
+    : Inst(Inst) {
 
   ETy = Inst.getType();
   if (BaseOpIdx)

IGC/VectorCompiler/lib/GenXCodeGen/GenXUtil.h

@@ -331,7 +331,7 @@ class IVSplitter {
   // If BaseOpIdx indexes a scalar/vector operand of i64 type, then
   // IsI64Operation shall return true, otherwise the value type of an
   // instruction is used
-  IVSplitter(Instruction &Inst, unsigned* BaseOpIdx = nullptr);
+  IVSplitter(Instruction &Inst, const unsigned *BaseOpIdx = nullptr);
 
   // Splitted Operand is expected to be a scalar/vector of i64 type
   LoHiSplit splitOperandLoHi(unsigned SourceIdx);