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Guzewicz, Kacperigcbot
Guzewicz, Kacper
authored and
igcbot
committed
Conversion of IGC LITs for opaque pointer support, batch 12
This commit converts part of LITs so that igc_opt uses "--opaque-pointers" option that allows automatic conversion between typed and opaque pointers. Typed version of tests are still kept in separate files.
1 parent 7085d99 commit 9e34a4c

30 files changed

+901
-42
lines changed

‎IGC/Compiler/tests/ScalarArgAsPointer/struct_byptr-typed-pointers.ll‎

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;=========================== begin_copyright_notice ============================
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;
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; Copyright (C) 2022 Intel Corporation
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;
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; SPDX-License-Identifier: MIT
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;
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;============================ end_copyright_notice =============================
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9+
; RUN: igc_opt --igc-agg-arg-analysis --igc-add-implicit-args --igc-agg-arg --instcombine --igc-scalar-arg-as-pointer-analysis -igc-serialize-metadata -S %s | FileCheck %s
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;
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; OpenCL kernel:
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;
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; struct Foo { long a; };
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; kernel void test(global struct Foo* foo) {
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; *((global int*)foo->a) = 39;
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; }
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;
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; Struct is provided by pointer, aggregate and implicit argument passes will not decompose
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; aggregate argument into basic type arguments, no scalar kernel argument to match.
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;
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; CHECK-NOT: m_OpenCLArgScalarAsPointersSet
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%struct.Foo = type { i64 }
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define spir_kernel void @test(%struct.Foo addrspace(1)* %foo) #0 {
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entry:
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%a = getelementptr inbounds %struct.Foo, %struct.Foo addrspace(1)* %foo, i32 0, i32 0
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%0 = load i64, i64 addrspace(1)* %a, align 8
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%1 = inttoptr i64 %0 to i32 addrspace(1)*
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store i32 39, i32 addrspace(1)* %1, align 4
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ret void
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}
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!igc.functions = !{!0}
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!0 = !{void (%struct.Foo addrspace(1)*)* @test, !1}
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!1 = !{!2}
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!2 = !{!"function_type", i32 0}

‎IGC/Compiler/tests/ScalarArgAsPointer/struct_byptr.ll‎

Lines changed: 3 additions & 2 deletions
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@@ -1,12 +1,13 @@
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;=========================== begin_copyright_notice ============================
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;
3-
; Copyright (C) 2022 Intel Corporation
3+
; Copyright (C) 2022-2024 Intel Corporation
44
;
55
; SPDX-License-Identifier: MIT
66
;
77
;============================ end_copyright_notice =============================
88

9-
; RUN: igc_opt --igc-agg-arg-analysis --igc-add-implicit-args --igc-agg-arg --instcombine --igc-scalar-arg-as-pointer-analysis -igc-serialize-metadata -S %s | FileCheck %s
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; REQUIRES: llvm-14-plus
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; RUN: igc_opt --opaque-pointers --igc-agg-arg-analysis --igc-add-implicit-args --igc-agg-arg --instcombine --igc-scalar-arg-as-pointer-analysis -igc-serialize-metadata -S %s | FileCheck %s
1011
;
1112
; OpenCL kernel:
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;

‎IGC/Compiler/tests/ScalarArgAsPointer/struct_copy_in_alloca-typed-pointers.ll‎

Lines changed: 41 additions & 0 deletions
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;=========================== begin_copyright_notice ============================
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;
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; Copyright (C) 2022 Intel Corporation
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;
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; SPDX-License-Identifier: MIT
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;
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;============================ end_copyright_notice =============================
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9+
; RUN: igc_opt --igc-scalar-arg-as-pointer-analysis -igc-serialize-metadata -S %s | FileCheck %s
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;
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; Decomposed struct (implicit arguments) can be copied into local alloca. Pass must keep trace
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; of all stored kernel args, so when access to global memory traces back to alloca instruction,
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; it can be mapped back to correct implicit argument.
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;
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; Note: IR below already shows decomposed struct.
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;
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; CHECK-NOT: !{!"m_OpenCLArgScalarAsPointersSet[0]", i32 0}
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; CHECK-NOT: !{!"m_OpenCLArgScalarAsPointersSet[0]", i32 1}
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; CHECK: !{!"m_OpenCLArgScalarAsPointersSet[0]", i32 2}
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%struct.Foo = type { i64, i64 }
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define spir_kernel void @test(%struct.Foo* byval(%struct.Foo) %foo, i64 %const_reg_qword, i64 %const_reg_qword1) {
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entry:
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%foo_alloca = alloca %struct.Foo
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%0 = bitcast %struct.Foo* %foo_alloca to i8*
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%1 = getelementptr i8, i8* %0, i32 8
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%2 = bitcast i8* %1 to i64*
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store i64 %const_reg_qword1, i64* %2
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%a = getelementptr inbounds %struct.Foo, %struct.Foo* %foo_alloca, i32 0, i32 1
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%3 = load i64, i64* %a, align 8
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%4 = inttoptr i64 %3 to i32 addrspace(1)*
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store i32 39, i32 addrspace(1)* %4, align 4
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ret void
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}
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!igc.functions = !{!0}
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!0 = !{void (%struct.Foo*, i64, i64)* @test, !1}
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!1 = !{!2}
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!2 = !{!"function_type", i32 0}

‎IGC/Compiler/tests/ScalarArgAsPointer/struct_copy_in_alloca.ll‎

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,12 +1,13 @@
11
;=========================== begin_copyright_notice ============================
22
;
3-
; Copyright (C) 2022 Intel Corporation
3+
; Copyright (C) 2022-2024 Intel Corporation
44
;
55
; SPDX-License-Identifier: MIT
66
;
77
;============================ end_copyright_notice =============================
88

9-
; RUN: igc_opt --igc-scalar-arg-as-pointer-analysis -igc-serialize-metadata -S %s | FileCheck %s
9+
; REQUIRES: llvm-14-plus
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; RUN: igc_opt --opaque-pointers --igc-scalar-arg-as-pointer-analysis -igc-serialize-metadata -S %s | FileCheck %s
1011
;
1112
; Decomposed struct (implicit arguments) can be copied into local alloca. Pass must keep trace
1213
; of all stored kernel args, so when access to global memory traces back to alloca instruction,

‎IGC/Compiler/tests/ScalarArgAsPointer/vec_to_ptr-typed-pointers.ll‎

Lines changed: 27 additions & 0 deletions
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;=========================== begin_copyright_notice ============================
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;
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; Copyright (C) 2022 Intel Corporation
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;
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; SPDX-License-Identifier: MIT
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;
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;============================ end_copyright_notice =============================
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9+
; RUN: igc_opt --igc-scalar-arg-as-pointer-analysis -igc-serialize-metadata -S %s | FileCheck %s
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; Scalar kernel arg used as pointer to global memory, match.
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;
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; CHECK: !{!"m_OpenCLArgScalarAsPointersSet[0]", i32 0}
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define spir_kernel void @test(<3 x i64> %addrs) #0 {
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entry:
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%0 = extractelement <3 x i64> %addrs, i32 0
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%1 = inttoptr i64 %0 to i32 addrspace(1)*
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store i32 39, i32 addrspace(1)* %1, align 4
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ret void
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}
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!igc.functions = !{!0}
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!0 = !{void (<3 x i64>)* @test, !1}
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!1 = !{!2}
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!2 = !{!"function_type", i32 0}

‎IGC/Compiler/tests/ScalarArgAsPointer/vec_to_ptr.ll‎

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,12 +1,13 @@
11
;=========================== begin_copyright_notice ============================
22
;
3-
; Copyright (C) 2022 Intel Corporation
3+
; Copyright (C) 2022-2024 Intel Corporation
44
;
55
; SPDX-License-Identifier: MIT
66
;
77
;============================ end_copyright_notice =============================
88

9-
; RUN: igc_opt --igc-scalar-arg-as-pointer-analysis -igc-serialize-metadata -S %s | FileCheck %s
9+
; REQUIRES: llvm-14-plus
10+
; RUN: igc_opt --opaque-pointers --igc-scalar-arg-as-pointer-analysis -igc-serialize-metadata -S %s | FileCheck %s
1011

1112
; Scalar kernel arg used as pointer to global memory, match.
1213
;

‎IGC/Compiler/tests/SetFastMathFlags/basic-typed-pointers.ll‎

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;=========================== begin_copyright_notice ============================
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;
3+
; Copyright (C) 2022-2024 Intel Corporation
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;
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; SPDX-License-Identifier: MIT
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;
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;============================ end_copyright_notice =============================
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;
9+
; RUN: igc_opt -enable-debugify --igc-set-fast-math-flags -S < %s 2>&1 | FileCheck %s
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; ------------------------------------------------
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; SetFastMathFlags
12+
; ------------------------------------------------
13+
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; Debug-info related check
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;
16+
; CHECK-NOT: WARNING
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; CHECK: CheckModuleDebugify: PASS
18+
19+
define void @test_fast(float %src1, float %src2) #0 {
20+
; CHECK-LABEL: @test_fast(
21+
; CHECK: fadd fast float
22+
; CHECK: fsub fast float
23+
; CHECK: call fast float @llvm.sqrt.f32
24+
;
25+
%1 = fadd float %src1, %src2
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%2 = fsub float %src1, %src2
27+
%3 = call float @llvm.sqrt.f32(float %src1)
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ret void
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}
30+
31+
define void @test_nozero(float %src1, float %src2) #1 {
32+
; CHECK-LABEL: @test_nozero(
33+
; CHECK: fadd nsz float
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; CHECK: fsub nsz float
35+
; CHECK: call float @llvm.sqrt.f32
36+
;
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%1 = fadd float %src1, %src2
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%2 = fsub float %src1, %src2
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%3 = call float @llvm.sqrt.f32(float %src1)
40+
ret void
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}
42+
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define void @test_noinf(float %src1, float %src2) #2 {
44+
; CHECK-LABEL: @test_noinf(
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; CHECK: fadd ninf float
46+
; CHECK: fsub ninf float
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; CHECK: call float @llvm.sqrt.f32
48+
;
49+
%1 = fadd float %src1, %src2
50+
%2 = fsub float %src1, %src2
51+
%3 = call float @llvm.sqrt.f32(float %src1)
52+
ret void
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}
54+
55+
define void @test_nonan(float %src1, float %src2) #3 {
56+
; CHECK-LABEL: @test_nonan(
57+
; CHECK: fadd nnan float
58+
; CHECK: fsub nnan float
59+
; CHECK: call float @llvm.sqrt.f32
60+
;
61+
%1 = fadd float %src1, %src2
62+
%2 = fsub float %src1, %src2
63+
%3 = call float @llvm.sqrt.f32(float %src1)
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ret void
65+
}
66+
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attributes #0 = { "unsafe-fp-math"="true" }
68+
attributes #1 = { "no-signed-zeros-fp-math"="true" }
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attributes #2 = { "no-infs-fp-math"="true" }
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attributes #3 = { "no-nans-fp-math"="true" }
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declare float @llvm.sqrt.f32(float) #0
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!IGCMetadata = !{!0}
74+
!igc.functions = !{}
75+
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!0 = !{!"ModuleMD", !1}
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!1 = !{!"compOpt", !2, !3, !4}
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!2 = !{!"FastRelaxedMath", i1 true}
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!3 = !{!"NoSignedZeros", i1 true}
80+
!4 = !{!"FiniteMathOnly", i1 true}

‎IGC/Compiler/tests/SetFastMathFlags/basic.ll‎

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -6,7 +6,8 @@
66
;
77
;============================ end_copyright_notice =============================
88
;
9-
; RUN: igc_opt -enable-debugify --igc-set-fast-math-flags -S < %s 2>&1 | FileCheck %s
9+
; REQUIRES: llvm-14-plus
10+
; RUN: igc_opt --opaque-pointers -enable-debugify --igc-set-fast-math-flags -S < %s 2>&1 | FileCheck %s
1011
; ------------------------------------------------
1112
; SetFastMathFlags
1213
; ------------------------------------------------

‎IGC/Compiler/tests/Simd32Profitability/case1_bin_op-typed-pointers.ll‎

Lines changed: 65 additions & 0 deletions
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1+
;=========================== begin_copyright_notice ============================
2+
;
3+
; Copyright (C) 2023 Intel Corporation
4+
;
5+
; SPDX-License-Identifier: MIT
6+
;
7+
;============================ end_copyright_notice =============================
8+
;
9+
; REQUIRES: regkeys
10+
; RUN: igc_opt --regkey PrintToConsole --regkey PSSIMD32HeuristicFP16 --enable-profitability-print --simd32-profit -igc-serialize-metadata --inputps -S < %s 2>&1 | FileCheck %s
11+
; RUN: igc_opt --regkey PrintToConsole --regkey PSSIMD32HeuristicLoopAndDiscard --enable-profitability-print --simd32-profit -igc-serialize-metadata --inputps -S < %s 2>&1 | FileCheck %s
12+
;
13+
; RUN: igc_opt --regkey PrintToConsole --regkey OCLSIMD16SelectionMask=1 --enable-profitability-print --simd32-profit -igc-serialize-metadata --inputocl -S < %s 2>&1 | FileCheck %s
14+
; RUN: igc_opt --regkey PrintToConsole --regkey OCLSIMD16SelectionMask=2 --enable-profitability-print --simd32-profit -igc-serialize-metadata --inputocl -S < %s 2>&1 | FileCheck %s
15+
; RUN: igc_opt --regkey PrintToConsole --regkey OCLSIMD16SelectionMask=4 --enable-profitability-print --simd32-profit -igc-serialize-metadata --inputocl -S < %s 2>&1 | FileCheck %s
16+
;
17+
; RUN: igc_opt --regkey PrintToConsole --enable-profitability-print --simd32-profit -igc-serialize-metadata --inputocl --platformglk -S < %s 2>&1 | FileCheck %s
18+
; ------------------------------------------------
19+
; Simd32ProfitabilityAnalysis
20+
; ------------------------------------------------
21+
22+
; CHECK: {{.*}}isSimd16Profitable: 1{{.*}}
23+
; CHECK-NEXT: {{.*}}isSimd32Profitable: 0{{.*}}
24+
25+
declare void @use_int(i32)
26+
declare i16 @llvm.genx.GenISA.getLocalID.X()
27+
28+
define void @test_func(i32 %a, i32 addrspace(1)* %ptr) {
29+
entry:
30+
%local_id = call i16 @llvm.genx.GenISA.getLocalID.X()
31+
%id = zext i16 %local_id to i32
32+
br label %loop
33+
34+
loop:
35+
%indvar = phi i32 [ %id, %entry ], [ %nextindvar, %loop ]
36+
37+
%ld = load i32, i32 addrspace(1)* %ptr
38+
%st = add i32 %ld, %id
39+
store i32 %st, i32 addrspace(1)* %ptr
40+
41+
%cmp = icmp sle i32 %indvar, 0
42+
%sel = select i1 %cmp, i32 10, i32 20
43+
%nextindvar = sub i32 %sel, %indvar
44+
45+
%cond_gt = icmp ugt i32 %nextindvar, 0
46+
%cond_lt = icmp ult i32 %nextindvar, %id
47+
%cond = or i1 %cond_gt, %cond_lt
48+
br i1 %cond, label %loop, label %loop_end
49+
50+
loop_end:
51+
call void @use_int(i32 %nextindvar)
52+
53+
ret void
54+
}
55+
56+
!IGCMetadata = !{!0}
57+
!igc.functions = !{!4}
58+
59+
!0 = !{!"ModuleMD", !1}
60+
!1 = !{!"FuncMD", !2, !3}
61+
!2 = !{!"FuncMDMap[0]", void (i32, i32 addrspace(1)*)* @test_func}
62+
!3 = !{!"FuncMDValue[0]"}
63+
!4 = !{void (i32, i32 addrspace(1)*)* @test_func, !5}
64+
!5 = !{!6}
65+
!6 = !{!"function_type", i32 0}

‎IGC/Compiler/tests/Simd32Profitability/case1_bin_op.ll‎

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -1,20 +1,20 @@
11
;=========================== begin_copyright_notice ============================
22
;
3-
; Copyright (C) 2023 Intel Corporation
3+
; Copyright (C) 2023-2024 Intel Corporation
44
;
55
; SPDX-License-Identifier: MIT
66
;
77
;============================ end_copyright_notice =============================
88
;
9-
; REQUIRES: regkeys
10-
; RUN: igc_opt --regkey PrintToConsole --regkey PSSIMD32HeuristicFP16 --enable-profitability-print --simd32-profit -igc-serialize-metadata --inputps -S < %s 2>&1 | FileCheck %s
11-
; RUN: igc_opt --regkey PrintToConsole --regkey PSSIMD32HeuristicLoopAndDiscard --enable-profitability-print --simd32-profit -igc-serialize-metadata --inputps -S < %s 2>&1 | FileCheck %s
9+
; REQUIRES: llvm-14-plus, regkeys
10+
; RUN: igc_opt --opaque-pointers --regkey PrintToConsole --regkey PSSIMD32HeuristicFP16 --enable-profitability-print --simd32-profit -igc-serialize-metadata --inputps -S < %s 2>&1 | FileCheck %s
11+
; RUN: igc_opt --opaque-pointers --regkey PrintToConsole --regkey PSSIMD32HeuristicLoopAndDiscard --enable-profitability-print --simd32-profit -igc-serialize-metadata --inputps -S < %s 2>&1 | FileCheck %s
1212
;
13-
; RUN: igc_opt --regkey PrintToConsole --regkey OCLSIMD16SelectionMask=1 --enable-profitability-print --simd32-profit -igc-serialize-metadata --inputocl -S < %s 2>&1 | FileCheck %s
14-
; RUN: igc_opt --regkey PrintToConsole --regkey OCLSIMD16SelectionMask=2 --enable-profitability-print --simd32-profit -igc-serialize-metadata --inputocl -S < %s 2>&1 | FileCheck %s
15-
; RUN: igc_opt --regkey PrintToConsole --regkey OCLSIMD16SelectionMask=4 --enable-profitability-print --simd32-profit -igc-serialize-metadata --inputocl -S < %s 2>&1 | FileCheck %s
13+
; RUN: igc_opt --opaque-pointers --regkey PrintToConsole --regkey OCLSIMD16SelectionMask=1 --enable-profitability-print --simd32-profit -igc-serialize-metadata --inputocl -S < %s 2>&1 | FileCheck %s
14+
; RUN: igc_opt --opaque-pointers --regkey PrintToConsole --regkey OCLSIMD16SelectionMask=2 --enable-profitability-print --simd32-profit -igc-serialize-metadata --inputocl -S < %s 2>&1 | FileCheck %s
15+
; RUN: igc_opt --opaque-pointers --regkey PrintToConsole --regkey OCLSIMD16SelectionMask=4 --enable-profitability-print --simd32-profit -igc-serialize-metadata --inputocl -S < %s 2>&1 | FileCheck %s
1616
;
17-
; RUN: igc_opt --regkey PrintToConsole --enable-profitability-print --simd32-profit -igc-serialize-metadata --inputocl --platformglk -S < %s 2>&1 | FileCheck %s
17+
; RUN: igc_opt --opaque-pointers --regkey PrintToConsole --enable-profitability-print --simd32-profit -igc-serialize-metadata --inputocl --platformglk -S < %s 2>&1 | FileCheck %s
1818
; ------------------------------------------------
1919
; Simd32ProfitabilityAnalysis
2020
; ------------------------------------------------

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