ConstCoalescing SEXT/ZEXT Fix

Fix bug where pass treated zero-extended values as sign-extended values in add instruction

Author: obrotowy

IGC/Compiler/CISACodeGen/ConstantCoalescing.cpp

@@ -845,7 +845,8 @@ void ConstantCoalescing::MergeUniformLoad(Instruction *load, Value *bufIdxV, uin
   auto shouldMerge = [&](const BufChunk *cur_chunk) {
     if (CompareBufferBase(cur_chunk->bufIdxV, cur_chunk->addrSpace, bufIdxV, addrSpace) &&
         cur_chunk->baseIdxV == eltIdxV && cur_chunk->chunkIO->getType()->getScalarType() == loadEltTy &&
-        CompareMetadata(cur_chunk->chunkIO, load) && !CheckForAliasingWrites(addrSpace, cur_chunk->chunkIO, load)) {
+        CompareMetadata(cur_chunk->chunkIO, load) && !CheckForAliasingWrites(addrSpace, cur_chunk->chunkIO, load) &&
+        cur_chunk->extensionKind == Extension) {
       uint lb = std::min(eltid, cur_chunk->chunkStart);
       uint ub = std::max(eltid + maxEltPlus, cur_chunk->chunkStart + cur_chunk->chunkSize);
       if (profitableChunkSize(ub, lb, scalarSizeInBytes) && (isDwordAligned || eltid >= cur_chunk->chunkStart)) {
@@ -893,6 +894,7 @@ void ConstantCoalescing::MergeUniformLoad(Instruction *load, Value *bufIdxV, uin
       cov_chunk->elementSize = scalarSizeInBytes;
       cov_chunk->chunkStart = eltid;
       cov_chunk->chunkSize = RoundChunkSize(maxEltPlus);
+      cov_chunk->extensionKind = Extension;
       const alignment_t chunkAlignment = std::max<alignment_t>(alignment, 4);
       cov_chunk->chunkIO = CreateChunkLoad(load, cov_chunk, eltid, chunkAlignment, Extension);
       chunk_vec.push_back(cov_chunk);

IGC/Compiler/CISACodeGen/ConstantCoalescing.hpp

@@ -34,6 +34,12 @@ using namespace llvm;
 
 namespace IGC {
 
+enum ExtensionKind {
+  EK_NotExtended,
+  EK_SignExt,
+  EK_ZeroExt,
+};
+
 struct BufChunk {
   llvm::Value *bufIdxV;       // buffer index when it is indirect
   llvm::Value *baseIdxV;      // base-address index when it is indirect
@@ -43,6 +49,7 @@ struct BufChunk {
   uint chunkSize;             // chunk size in elements
   llvm::Instruction *chunkIO; // coalesced load
   uint loadOrder;             // direct CB used order.
+  ExtensionKind extensionKind;
 };
 
 class ConstantCoalescing : public llvm::FunctionPass {
@@ -70,11 +77,6 @@ class ConstantCoalescing : public llvm::FunctionPass {
   virtual StringRef getPassName() const override { return IGCOpts::ConstantCoalescingPass; }
 
 private:
-  enum ExtensionKind {
-    EK_NotExtended,
-    EK_SignExt,
-    EK_ZeroExt,
-  };
 
   class IRBuilderWrapper : protected llvm::IGCIRBuilder<> {
 

IGC/Compiler/tests/ConstantCoalescing/sext-zext-merging-typed-pointers.ll

@@ -0,0 +1,64 @@
+;=========================== begin_copyright_notice ============================
+;
+; Copyright (C) 2025 Intel Corporation
+;
+; SPDX-License-Identifier: MIT
+;
+;============================ end_copyright_notice =============================
+;
+; RUN: igc_opt --typed-pointers --igc-constant-coalescing -dce -S < %s | FileCheck %s
+
+
+define void @test_sext_zext(i32 addrspace(2)* %ca, i16 %offset) {
+  ; CHECK-LABEL: @test_sext_zext
+  ; CHECK: [[S1:%.*]] = sext i16 %offset to i32
+  ; CHECK: [[Z1:%.*]] = zext i16 %offset to i32
+  ; CHECK: [[Z2:%.*]] = add i32 [[Z1]], 4
+  ; CHECK: [[PTR:%.*]] = ptrtoint i32 addrspace(2)* %ca to i32
+  ; CHECK: [[I1:%.*]] = add i32 [[PTR]], [[S1]]
+  ; CHECK: [[I2:%.*]] = add i32 [[PTR]], [[Z2]]
+  ; CHECK: [[PTR1:%.*]] = inttoptr i32 {{%.*}} to <1 x i32> addrspace(2)*
+  ; CHECK: {{%.*}} = load <1 x i32>, <1 x i32> addrspace(2)* [[PTR1]], align 4
+  ; CHECK: [[PTR2:%.*]] = inttoptr i32 {{%.*}} to <1 x i32> addrspace(2)*
+  ; CHECK: {{%.*}} = load <1 x i32>, <1 x i32> addrspace(2)* [[PTR2]], align 4
+  %s1 = sext i16 %offset to i32
+  %z1 = zext i16 %offset to i32
+  %z2 = add i32 %z1, 4
+  %p1 = ptrtoint i32 addrspace(2)* %ca to i32
+  %i1 = add i32 %p1, %s1
+  %i2 = add i32 %p1, %z2
+  %a1 = inttoptr i32 %i1 to i32 addrspace(2)*
+  %a2 = inttoptr i32 %i2 to i32 addrspace(2)*
+  %1 = load i32, i32 addrspace(2)* %a2, align 4
+  %2 = load i32, i32 addrspace(2)* %a1, align 4
+  call void @use.i32(i32 %1)
+  call void @use.i32(i32 %2)
+  ret void
+}
+
+define void @test_zext_coalescing(i32 addrspace(2)* %ca, i16 %offset) {
+  ; CHECK-LABEL: @test_zext_coalescing
+  ; CHECK: {{%.*}} = load <2 x i32>, <2 x i32> addrspace(2)* {{%.*}}, align 4
+  ; CHECK-NOT: load
+  %z1 = zext i16 %offset to i32
+  %z2 = add i32 %z1, 4
+  %p1 = ptrtoint i32 addrspace(2)* %ca to i32
+  %i1 = add i32 %p1, %z1
+  %i2 = add i32 %p1, %z2
+  %a1 = inttoptr i32 %i1 to i32 addrspace(2)*
+  %a2 = inttoptr i32 %i2 to i32 addrspace(2)*
+  %1 = load i32, i32 addrspace(2)* %a2, align 4
+  %2 = load i32, i32 addrspace(2)* %a1, align 4
+  call void @use.i32(i32 %1)
+  call void @use.i32(i32 %2)
+  ret void
+}
+
+declare void @use.i32(i32)
+
+!igc.functions = !{!0, !4}
+!0 = !{void (i32 addrspace(2)*, i16)* @test_sext_zext, !1}
+!1 = !{!2, !3}
+!2 = !{!"function_type", i32 0}
+!3 = !{!"implicit_arg_desc"}
+!4 = !{void (i32 addrspace(2)*, i16)* @test_zext_coalescing, !1}