Fix crash in AddRequiredMemoryFences pass

In kernels with `unreachable` instructions, it may be impossible to
find a post common dominator for all "unfenced" SLM stores. In such case,
add the fence immediately before the return.

(cherry picked from commit ac0e352)

Author: mmerecki

IGC/Compiler/Legalizer/AddRequiredMemoryFences.cpp

@@ -163,10 +163,10 @@ bool AddRequiredMemoryFences::runOnFunction(Function& F)
         SmallPtrSet<BasicBlock*, 16> seen{ rootBB };
         SmallVector<BasicBlock*, 16> worklist{ rootBB };
         SmallVector<BasicBlock*, 8> unfenced;
-        bool hasUnfencedSlmStore = false;
-        bool hasSlmFence = false;
         while (!worklist.empty())
         {
+            bool hasUnfencedSlmStore = false;
+            bool hasSlmFence = false;
             BasicBlock* BB = worklist.back();
             worklist.pop_back();
             seen.insert(BB);
@@ -205,23 +205,32 @@ bool AddRequiredMemoryFences::runOnFunction(Function& F)
             {
                 auto it = blocks.begin();
                 BasicBlock* postDomBB = *it++;
-                for (; it != blocks.end(); ++it)
+                for (; it != blocks.end() && postDomBB != nullptr; ++it)
                 {
                     postDomBB = PDT->findNearestCommonDominator(postDomBB, *it);
                 }
                 return postDomBB;
             };
             BasicBlock* postDomBB = FindPostDominator(unfenced);
-            Loop* L = LI->getLoopFor(postDomBB);
-            if (L)
+            if (postDomBB != nullptr)
             {
-                while (!L->isOutermost())
+                Loop* L = LI->getLoopFor(postDomBB);
+                if (L)
                 {
-                    L = L->getParentLoop();
+                    while (!L->isOutermost())
+                    {
+                        L = L->getParentLoop();
+                    }
+                    SmallVector<BasicBlock*, 4> exitBlocks;
+                    L->getUniqueExitBlocks(exitBlocks);
+                    postDomBB = FindPostDominator(exitBlocks);
                 }
-                SmallVector<BasicBlock*, 4> exitBlocks;
-                L->getUniqueExitBlocks(exitBlocks);
-                postDomBB = FindPostDominator(exitBlocks);
+            }
+            if (postDomBB == nullptr)
+            {
+                // Common post-dominator may not exist if kernel has the unreachable
+                // instruction.
+                postDomBB = rootBB;
             }
             IGC_ASSERT(postDomBB);
             IGCIRBuilder<> IRB(postDomBB->getTerminator());

IGC/Compiler/tests/AddRequiredMemoryFences/slm-fence-before-return-no-common-dominator.ll

@@ -0,0 +1,46 @@
+;=========================== begin_copyright_notice ============================
+;
+; Copyright (C) 2024 Intel Corporation
+;
+; SPDX-License-Identifier: MIT
+;
+;============================ end_copyright_notice =============================
+
+
+; REQUIRES: llvm-14-plus
+; RUN: igc_opt --opaque-pointers %s -S --platformdg2 --inputcs --igc-add-required-memory-fences | FileCheck %s
+
+
+; Test that pass added an SLM fence in the last basic block
+define void @f3(ptr addrspace(3) %address, i1 %cond, i1 %cond1) {
+Label-0:
+  store i32 0, ptr addrspace(3) %address
+  br i1 %cond, label %Label-True, label %Label-Merge
+Label-True:
+  store i32 0, ptr addrspace(3) %address
+  br i1 %cond1, label %Label-Unreachable, label %Label-Merge
+Label-Unreachable:
+  unreachable
+Label-Merge:
+  br label %Label-End
+Label-End:
+  ret void
+}
+; CHECK-LABEL: define void @f3
+; CHECK-NOT:  call void @llvm.genx.GenISA.LSCFence({{.*}})
+; CHECK-LABEL: Label-End:
+; CHECK-NEXT: call void @llvm.genx.GenISA.LSCFence(i32 3, i32 0, i32 0)
+; CHECK-NOT:  call void @llvm.genx.GenISA.LSCFence({{.*}})
+; CHECK:      ret void
+
+
+
+; Function Attrs: convergent nounwind
+declare void @llvm.genx.GenISA.LSCFence(i32, i32, i32) #2
+; Function Attrs: argmemonly nounwind
+declare i32 @llvm.genx.GenISA.intatomicraw.i32.p3(ptr addrspace(3), i32, i32, i32) #3
+
+attributes #1 = { "null-pointer-is-valid"="true" }
+attributes #2 = { convergent nounwind }
+attributes #3 = { argmemonly nounwind }
+attributes #4 = { nounwind }