Clean dirty cache lines for release fence

.

(cherry picked from commit 2b94d63)

Author: KorovinVlad

IGC/VectorCompiler/lib/GenXCodeGen/GenXLoadStoreLowering.cpp

@@ -290,6 +290,20 @@ static bool isSPIRVAtomic(const Value *Val) {
   }
 }
 
+static LSC_FENCE_OP getLSCFenceOp(AtomicOrdering Ordering) {
+  switch (Ordering) {
+  default:
+    return LSC_FENCE_OP_NONE;
+  case AtomicOrdering::Acquire:
+    return LSC_FENCE_OP_INVALIDATE;
+  case AtomicOrdering::Release:
+    return LSC_FENCE_OP_CLEAN;
+  case AtomicOrdering::AcquireRelease:
+  case AtomicOrdering::SequentiallyConsistent:
+    return LSC_FENCE_OP_EVICT;
+  }
+}
+
 void GenXLoadStoreLowering::getAnalysisUsage(AnalysisUsage &AU) const {
   AU.addRequired<TargetPassConfig>();
   AU.addRequired<GenXBackendConfig>();
@@ -1110,13 +1124,8 @@ GenXLoadStoreLowering::createLSCStandAloneFence(FenceInst &I) const {
     return nullptr;
 
   bool IsGlobal = AS == vc::AddrSpace::Global;
-  bool IsInvalidateL1 = Ordering == AtomicOrdering::SequentiallyConsistent ||
-                        Ordering == AtomicOrdering::AcquireRelease ||
-                        Ordering == AtomicOrdering::Acquire;
-  IsInvalidateL1 &= IsGlobal;
-
+  auto FenceOp = IsGlobal ? getLSCFenceOp(Ordering) : LSC_FENCE_OP_NONE;
   auto SubFuncID = IsGlobal ? LSC_UGM : LSC_SLM;
-  auto FenceOp = IsInvalidateL1 ? LSC_FENCE_OP_INVALIDATE : LSC_FENCE_OP_NONE;
   auto Scope = getLSCFenceScope(&I);
 
   auto *M = I.getModule();

IGC/VectorCompiler/test/LoadStoreLowering/fence.ll

@@ -21,21 +21,28 @@ define void @fence_acq() {
 
 define void @fence_rel() {
   ; CHECK: call void @llvm.genx.fence(i8 1)
-  ; CHECK-LSC: call void @llvm.genx.lsc.fence.i1(i1 true, i8 0, i8 0, i8 2)
+  ; CHECK-LSC: call void @llvm.genx.lsc.fence.i1(i1 true, i8 0, i8 4, i8 2)
   fence syncscope("device") release
   ret void
 }
 
 define void @fence_acq_rel() {
+  ; CHECK: call void @llvm.genx.fence(i8 65)
+  ; CHECK-LSC: call void @llvm.genx.lsc.fence.i1(i1 true, i8 0, i8 1, i8 2)
+  fence syncscope("device") acq_rel
+  ret void
+}
+
+define void @fence_acq_rel_wg() {
   ; CHECK: call void @llvm.genx.fence(i8 33)
   ; CHECK-LSC: call void @llvm.genx.lsc.fence.i1(i1 true, i8 3, i8 0, i8 0)
   fence syncscope("workgroup") acq_rel
   ret void
 }
 
 define void @fence_seq_cst() {
-  ; CHECK-NOT: call void @llvm.genx.fence(i8 33)
-  ; CHECK-LSC-NOT: call void @llvm.genx.lsc.fence.i1(i1 true, i8 3, i8 0, i8 0)
+  ; CHECK-NOT: call void @llvm.genx.fence
+  ; CHECK-LSC-NOT: call void @llvm.genx.lsc.fence.i1
   fence syncscope("subgroup") seq_cst
   ret void
 }