fix test

igc_opt returns non-zero on failed assert

Author: pkwasnie-intel

IGC/Compiler/Optimizer/OpenCLPasses/DpasFuncs/DpasFuncsResolution.cpp

@@ -107,6 +107,8 @@ class DpasFuncsResolution : public FunctionPass, public InstVisitor<DpasFuncsRes
        ///
   static const StringRef SG_PREFIX_IDPAS16;
   static const StringRef SG_PREFIX_FDPAS16;
+  static const StringRef SG_PREFIX_IDPAS32N16;
+  static const StringRef SG_PREFIX_FDPAS32N16;
   // PVC+: pure hf/bf dpas builtins
   static const StringRef WI_PREFIX_HFDPAS;
   static const StringRef WI_PREFIX_BFDPAS;
@@ -200,6 +202,8 @@ const StringRef DpasFuncsResolution::WI_PREFIX_IDPAS = "__builtin_IB_idpas";
 const StringRef DpasFuncsResolution::WI_PREFIX_FDPAS = "__builtin_IB_fdpas";
 const StringRef DpasFuncsResolution::SG_PREFIX_IDPAS16 = "__builtin_IB_sub_group16_idpas";
 const StringRef DpasFuncsResolution::SG_PREFIX_FDPAS16 = "__builtin_IB_sub_group16_fdpas";
+const StringRef DpasFuncsResolution::SG_PREFIX_IDPAS32N16 = "__builtin_IB_sub_group32n16_idpas";
+const StringRef DpasFuncsResolution::SG_PREFIX_FDPAS32N16 = "__builtin_IB_sub_group32n16_fdpas";
 // PVC+: pure hf/bf dpas builtins
 const StringRef DpasFuncsResolution::WI_PREFIX_HFDPAS = "__builtin_IB_hfdpas";
 const StringRef DpasFuncsResolution::WI_PREFIX_BFDPAS = "__builtin_IB_bfdpas";
@@ -263,6 +267,11 @@ void DpasFuncsResolution::visitCallInst(CallInst &CI) {
 
   bool IsDpasw = false;
   bool IsIDpas = false;
+  // Dimension N is platform specific and is directly correlated to minimum subgroup-size for
+  // given platform. If DPAS with the same M, N, K dimensions is executed within a subgroup
+  // twice the size of minimum subgroup-size, each work item must contain half of the data
+  // compared to the minimum subgroup-size.
+  bool IsDoubleSubgroup = false;
   int DstTy, AccTy, PA, PB, SD, RC;
   GenISAIntrinsic::ID iid = GenISAIntrinsic::no_intrinsic;
   bool doVerify = false;
@@ -277,12 +286,26 @@ void DpasFuncsResolution::visitCallInst(CallInst &CI) {
       if (!demangleSuffix(funcName, SG_PREFIX_LEN, false, IsIDpas, DstTy, AccTy, PA, PB, SD, RC, nullptr))
         return;
       iid = GenISAIntrinsic::GenISA_sub_group_dpas;
+    } else if (funcName.startswith(DpasFuncsResolution::SG_PREFIX_IDPAS32N16)) {
+      const int SG_PREFIX_LEN = DpasFuncsResolution::SG_PREFIX_IDPAS32N16.size();
+      IsIDpas = true;
+      IsDoubleSubgroup = true;
+      if (!demangleSuffix(funcName, SG_PREFIX_LEN, false, IsIDpas, DstTy, AccTy, PA, PB, SD, RC, nullptr))
+        return;
+      iid = GenISAIntrinsic::GenISA_sub_group_dpas;
     } else if (funcName.startswith(DpasFuncsResolution::SG_PREFIX_FDPAS16)) {
       const int SG_PREFIX_LEN = DpasFuncsResolution::SG_PREFIX_FDPAS16.size();
       IsIDpas = false;
       if (!demangleSuffix(funcName, SG_PREFIX_LEN, true, IsIDpas, DstTy, AccTy, PA, PB, SD, RC, nullptr))
         return;
       iid = GenISAIntrinsic::GenISA_sub_group_dpas;
+    } else if (funcName.startswith(DpasFuncsResolution::SG_PREFIX_FDPAS32N16)) {
+      const int SG_PREFIX_LEN = DpasFuncsResolution::SG_PREFIX_FDPAS32N16.size();
+      IsIDpas = false;
+      IsDoubleSubgroup = true;
+      if (!demangleSuffix(funcName, SG_PREFIX_LEN, true, IsIDpas, DstTy, AccTy, PA, PB, SD, RC, nullptr))
+        return;
+      iid = GenISAIntrinsic::GenISA_sub_group_dpas;
     }
     else {
       return;
@@ -363,6 +386,14 @@ void DpasFuncsResolution::visitCallInst(CallInst &CI) {
     Type *A_BaseTy = ATy->getScalarType();
     Type *B_BaseTy = BTy->getScalarType();
 
+    if (IsDoubleSubgroup) {
+      IGC_ASSERT_MESSAGE(RC >= 2, "ICE: repeat count of DPAS for double subgroup-size must be >= 2!");
+      D_nelts *= 2;
+      ACC_nelts *= 2;
+      A_nelts *= 2;
+      B_nelts *= 2;
+    }
+
     if (IsIDpas) {
       uint32_t Abits = getPrecisionInBits((PrecisionType)PA);
       uint32_t Bbits = getPrecisionInBits((PrecisionType)PB);

IGC/Compiler/Optimizer/OpenCLPasses/SpvSubgroupMMAResolution/SpvSubgroupMMAResolution.cpp

@@ -272,7 +272,7 @@ int SpvSubgroupMMAResolution::getElemCount(const Type *Ty) const {
 }
 
 bool SpvSubgroupMMAResolution::validateElemCounts(int M, int AElemCount, int BElemCount, uint32_t Operands,
-                                                  const CallInst &CI) {
+                                                  CallInst &CI) {
   if (M != 1 && M != 2 && M != 4 && M != 8) {
     emitError(
         "__spirv_SubgroupMatrixMultiplyAccumulateINTEL: M dimension must be 1, 2, 4 or 8 for targeted HW. Actual: " +
@@ -295,16 +295,27 @@ bool SpvSubgroupMMAResolution::validateElemCounts(int M, int AElemCount, int BEl
               CI);
     return false;
   }
-  if (BElemCount != 8) {
-    emitError("__spirv_SubgroupMatrixMultiplyAccumulateINTEL: Matrix B argument must have 8 components for targeted "
-              "HW. Actual: " +
-                  std::to_string(BElemCount),
+  const int expectedBCount = isDoubleSubgroup(CI) ? 4 : 8;
+  if (BElemCount != expectedBCount) {
+    emitError("__spirv_SubgroupMatrixMultiplyAccumulateINTEL: Matrix B argument must have " +
+                  std::to_string(expectedBCount) +
+                  " components for targeted  HW. Actual: " + std::to_string(BElemCount),
               CI);
     return false;
   }
   return true;
 }
 
+// Dimension N is platform specific and is directly correlated to minimum subgroup-size for
+// given platform. If DPAS with the same M, N, K dimensions is executed within a subgroup
+// twice the size of minimum subgroup-size, each work item must contain half of the data
+// compared to the minimum subgroup-size.
+bool SpvSubgroupMMAResolution::isDoubleSubgroup(CallInst &CI) {
+  if (!m_Ctx->platform.hasExecSize16DPAS())
+    return false;
+  return IGC::getSIMDSize(getAnalysis<MetaDataUtilsWrapper>().getMetaDataUtils(), CI.getParent()->getParent()) == 32;
+}
+
 SpvSubgroupMMAResolution::SupportedTable *SpvSubgroupMMAResolution::getSupportedTable() {
   if (m_Ctx->platform.hasExecSize16DPAS()) {
     if (m_Simd16Table.empty())
@@ -480,9 +491,16 @@ void SpvSubgroupMMAResolution::visitCallInst(CallInst &CI) {
   SmallVector<Type *, 3> argTypes({c->getType(), a->getType(), b->getType()});
   FunctionType *FT = FunctionType::get(CI.getType(), argTypes, false);
 
+  std::string subgroupSize;
+  if (isDoubleSubgroup(CI)) {
+    subgroupSize = "32n16";
+    M *= 2;
+  } else {
+    subgroupSize = m_Ctx->platform.hasExecSize16DPAS() ? "16" : "";
+  }
+
   std::stringstream newFuncName;
-  newFuncName << "__builtin_IB_sub_group";
-  newFuncName << (m_Ctx->platform.hasExecSize16DPAS() ? "16" : "");
+  newFuncName << "__builtin_IB_sub_group" << subgroupSize;
   newFuncName << "_" << (ResultElemTy == I32 ? "i" : "f");
   newFuncName << "dpas_" << OperandsIt->second.str() << "8_" << M;
 

IGC/Compiler/Optimizer/OpenCLPasses/SpvSubgroupMMAResolution/SpvSubgroupMMAResolution.hpp

@@ -72,7 +72,7 @@ class SpvSubgroupMMAResolution final : public llvm::ModulePass, public llvm::Ins
   bool validateI32Constant(const llvm::Value *V, const llvm::Twine &ParamName, const llvm::CallInst &CI);
   bool validateCType(const llvm::Type *ResultTy, const llvm::Type *CType, const llvm::CallInst &CI);
   bool validateElementType(const ElType ElemTy, llvm::StringRef ParamName, const llvm::CallInst &CI);
-  bool validateElemCounts(int M, int AElemCount, int BElemCount, uint32_t Operands, const llvm::CallInst &CI);
+  bool validateElemCounts(int M, int AElemCount, int BElemCount, uint32_t Operands, llvm::CallInst &CI);
 
   template <typename T>
   bool validateKDimInTable(const T KIt, int K, const SupportedTable *table, const llvm::CallInst &CI);
@@ -89,6 +89,8 @@ class SpvSubgroupMMAResolution final : public llvm::ModulePass, public llvm::Ins
   bool validateOperands(const T OpIt, int K, ElType ResultElemTy, ElType AElemTy, ElType BElemTy, uint32_t Operands,
                         const OperandsTable &operandMap, const llvm::CallInst &CI);
 
+  bool isDoubleSubgroup(llvm::CallInst &CI);
+
   llvm::DenseSet<llvm::Function *> m_BuiltinsToRemove;
   bool m_Changed = false;
   IGC::CodeGenContext *m_Ctx = nullptr;

IGC/Compiler/tests/DpasFuncsResolution/dpas-pvc-simd32.ll

@@ -0,0 +1,26 @@
+;=========================== begin_copyright_notice ============================
+;
+; Copyright (C) 2025 Intel Corporation
+;
+; SPDX-License-Identifier: MIT
+;
+;============================ end_copyright_notice =============================
+; UNSUPPORTED: system-windows
+; REQUIRES: debug, llvm-14-plus
+; RUN: not igc_opt --opaque-pointers -platformpvc --igc-arith-funcs-translation -S < %s 2>&1 | FileCheck %s
+; ------------------------------------------------
+; DpasFuncsResolution
+; ------------------------------------------------
+
+; Check assertion unique to DPAS in double-subgroup size.
+
+; CHECK: RC >= 2, ICE: repeat count of DPAS for double subgroup-size must be >= 2!
+
+define spir_kernel void @test_dpas(<4 x i32> %src, i32 %src2, ptr %dst) {
+  %1 = load i16, ptr %dst, align 4
+  %2 = call i32 @__builtin_IB_sub_group32n16_idpas_s8_s8_8_1(i32 %src2, i16 %1, <4 x i32> %src)
+  store i32 %2, ptr %dst, align 4
+  ret void
+}
+
+declare i32 @__builtin_IB_sub_group32n16_idpas_s8_s8_8_1(i32, i16, <4 x i32>)