@@ -54,6 +54,7 @@ IN THE SOFTWARE.
5454#include " llvmWrapper/IR/Instructions.h"
5555
5656#include " Probe/Assertion.h"
57+ #include < cstddef>
5758#include < iterator>
5859
5960using namespace llvm ;
@@ -131,7 +132,8 @@ CallInst *genx::createAddAddr(Value *Lhs, Value *Rhs, const Twine &Name,
131132 * %Name.unifiedret = call Ty @llvm.ssa_copy(Ty undef)
132133 */
133134CallInst *genx::createUnifiedRet (Type *Ty, const Twine &Name, Module *M) {
134- IGC_ASSERT (Ty && M && " wrong arguments" );
135+ IGC_ASSERT_MESSAGE (Ty, " wrong argument" );
136+ IGC_ASSERT_MESSAGE (M, " wrong argument" );
135137 auto G = Intrinsic::getDeclaration (M, Intrinsic::ssa_copy, Ty);
136138 return CallInst::Create (G, UndefValue::get (Ty), Name + " .unifiedret" ,
137139 static_cast <Instruction *>(nullptr ));
@@ -145,14 +147,14 @@ CallInst *genx::createUnifiedRet(Type *Ty, const Twine &Name, Module *M) {
145147 * result. For scalar case only LSB of the result is set to corresponding value.
146148 */
147149unsigned genx::getPredicateConstantAsInt (const Constant *C) {
148- IGC_ASSERT (C->getType ()->isIntOrIntVectorTy (1 ) &&
149- " wrong argument: constant of i1 or Nxi1 type was expected" );
150+ IGC_ASSERT_MESSAGE (C->getType ()->isIntOrIntVectorTy (1 ),
151+ " wrong argument: constant of i1 or Nxi1 type was expected" );
150152 if (auto CI = dyn_cast<ConstantInt>(C))
151153 return CI->getZExtValue (); // scalar
152154 unsigned Bits = 0 ;
153155 unsigned NumElements = cast<VectorType>(C->getType ())->getNumElements ();
154- IGC_ASSERT (NumElements <= sizeof (Bits) * CHAR_BIT &&
155- " vector has too much elements, it won't fit into Bits" );
156+ IGC_ASSERT_MESSAGE (NumElements <= sizeof (Bits) * CHAR_BIT,
157+ " vector has too much elements, it won't fit into Bits" );
156158 for (unsigned i = 0 ; i != NumElements; ++i) {
157159 auto El = C->getAggregateElement (i);
158160 if (!isa<UndefValue>(El))
@@ -360,8 +362,8 @@ bool genx::isIntNot(Instruction *Inst)
360362 */
361363Value *genx::invertCondition (Value *Condition)
362364{
363- IGC_ASSERT (Condition->getType ()->getScalarType ()->isIntegerTy (1 ) &&
364- " Condition is not of predicate type" );
365+ IGC_ASSERT_MESSAGE (Condition->getType ()->getScalarType ()->isIntegerTy (1 ),
366+ " Condition is not of predicate type" );
365367 // First: Check if it's a constant.
366368 if (Constant *C = dyn_cast<Constant>(Condition))
367369 return ConstantExpr::getNot (C);
@@ -486,15 +488,15 @@ Value *genx::getMaskOperand(const Instruction *Inst) {
486488// 2 operands it points. The operand is returned.
487489static Value *getOperandByMaskValue (const ShuffleVectorInst &SI,
488490 int MaskValue) {
489- IGC_ASSERT (MaskValue >= 0 && " invalid index" );
491+ IGC_ASSERT_MESSAGE (MaskValue >= 0 , " invalid index" );
490492 int FirstOpSize =
491493 cast<VectorType>(SI.getOperand (0 )->getType ())->getNumElements ();
492494 if (MaskValue < FirstOpSize)
493495 return SI.getOperand (0 );
494496 else {
495497 int SecondOpSize =
496498 cast<VectorType>(SI.getOperand (1 )->getType ())->getNumElements ();
497- IGC_ASSERT (MaskValue < FirstOpSize + SecondOpSize && " invalid index" );
499+ IGC_ASSERT_MESSAGE (MaskValue < FirstOpSize + SecondOpSize, " invalid index" );
498500 return SI.getOperand (1 );
499501 }
500502}
@@ -534,7 +536,7 @@ class MaskIndex {
534536
535537public:
536538 explicit MaskIndex (int InitIdx = 0 ) : Idx(InitIdx) {
537- IGC_ASSERT (Idx >= 0 && " Defined index must not be negative" );
539+ IGC_ASSERT_MESSAGE (Idx >= 0 , " Defined index must not be negative" );
538540 }
539541
540542 static MaskIndex getUndef () {
@@ -553,13 +555,13 @@ class MaskIndex {
553555 bool isDefined () const { return Idx >= 0 ; }
554556
555557 int get () const {
556- IGC_ASSERT (Idx >= 0 && " Can't call get() on invalid index" );
558+ IGC_ASSERT_MESSAGE (Idx >= 0 , " Can't call get() on invalid index" );
557559 return Idx;
558560 }
559561
560562 int operator -(MaskIndex const &rhs) const {
561- IGC_ASSERT (isDefined () && rhs. isDefined () &&
562- " All operand indices must be valid" );
563+ IGC_ASSERT_MESSAGE (isDefined (), " All operand indices must be valid " );
564+ IGC_ASSERT_MESSAGE (rhs. isDefined (), " All operand indices must be valid" );
563565 return Idx - rhs.Idx ;
564566 }
565567};
@@ -581,8 +583,8 @@ void makeSVIIndexesOperandIndexes(const ShuffleVectorInst &SI,
581583 });
582584 return ;
583585 }
584- IGC_ASSERT (&Operand == SI.getOperand (1 ) &&
585- " wrong argument: a shufflevector operand was expected" );
586+ IGC_ASSERT_MESSAGE (&Operand == SI.getOperand (1 ),
587+ " wrong argument: a shufflevector operand was expected" );
586588 std::transform (FirstIt, LastIt, OutIt, [FirstOpSize](int MaskVal) {
587589 if (MaskVal < 0 )
588590 return MaskIndex::getUndef ();
@@ -606,12 +608,11 @@ template <typename ForwardIter>
606608std::pair<ForwardIter, llvm::Optional<int >>
607609estimateHorizontalStride (ForwardIter FirstIt, ForwardIter LastIt) {
608610
609- IGC_ASSERT (FirstIt != LastIt && " the range must contain at least 1 element" );
610- IGC_ASSERT (std::none_of (FirstIt, LastIt,
611- [](MaskIndex Idx) { return Idx.isAnotherOp (); }) &&
612- " There must not be any AnotherOp indices in the range" );
613- IGC_ASSERT (FirstIt->isDefined () &&
614- " first element in range must be a valid index" );
611+ IGC_ASSERT_MESSAGE (FirstIt != LastIt, " the range must contain at least 1 element" );
612+ IGC_ASSERT_MESSAGE (std::none_of (FirstIt, LastIt, [](MaskIndex Idx) { return Idx.isAnotherOp (); }),
613+ " There must not be any AnotherOp indices in the range" );
614+ IGC_ASSERT_MESSAGE (FirstIt->isDefined (),
615+ " first element in range must be a valid index" );
615616 auto NextDefined =
616617 std::find_if (std::next (FirstIt), LastIt,
617618 [](MaskIndex Elem) { return Elem.isDefined (); });
@@ -644,12 +645,13 @@ estimateHorizontalStride(ForwardIter FirstIt, ForwardIter LastIt) {
644645template <typename ForwardIter>
645646Region matchVectorRegionByIndexes (Region FirstElemRegion, ForwardIter FirstIt,
646647 ForwardIter LastIt, int BoundIndex) {
647- IGC_ASSERT (FirstIt != LastIt && " the range must contain at least 1 element" );
648- IGC_ASSERT (std::none_of (FirstIt, LastIt,
649- [](MaskIndex Idx) { return Idx.isAnotherOp (); }) &&
650- " There must not be any AnotherOp indices in the range." );
651- IGC_ASSERT (FirstIt->isDefined () && std::prev (LastIt)->isDefined () &&
652- " expected FirstIt and --LastIt point to valid indices" );
648+ IGC_ASSERT_MESSAGE (FirstIt != LastIt, " the range must contain at least 1 element" );
649+ IGC_ASSERT_MESSAGE (std::none_of (FirstIt, LastIt, [](MaskIndex Idx) { return Idx.isAnotherOp (); }),
650+ " There must not be any AnotherOp indices in the range." );
651+ IGC_ASSERT_MESSAGE (FirstIt->isDefined (),
652+ " expected FirstIt and --LastIt point to valid indices" );
653+ IGC_ASSERT_MESSAGE (std::prev (LastIt)->isDefined (),
654+ " expected FirstIt and --LastIt point to valid indices" );
653655
654656 if (std::distance (FirstIt, LastIt) == 1 )
655657 return FirstElemRegion;
@@ -671,7 +673,7 @@ Region matchVectorRegionByIndexes(Region FirstElemRegion, ForwardIter FirstIt,
671673 NewRowIt = std::prev (NewRowIt, llvm::divideCeil (Overstep, *RefStride));
672674
673675 int Width = std::distance (FirstIt, NewRowIt);
674- IGC_ASSERT (Width > 0 && " should be at least 1 according to algorithm" );
676+ IGC_ASSERT_MESSAGE (Width > 0 , " should be at least 1 according to algorithm" );
675677 if (Width == 1 )
676678 // Stride doesn't play role when the Width is 1.
677679 // Also it prevents from writing to big value in the region.
@@ -701,13 +703,11 @@ llvm::Optional<int> estimateVerticalStride(Region FirstRowRegion,
701703 ForwardIter FirstIt,
702704 ForwardIter ReferenceIt) {
703705
704- IGC_ASSERT (std::distance (FirstIt, ReferenceIt) >=
705- static_cast <int >(FirstRowRegion.Width ) &&
706- " Reference element must not be part of first row" );
707- IGC_ASSERT (std::all_of (FirstIt, std::next (FirstIt, FirstRowRegion.Width ),
708- [](MaskIndex Elem) { return Elem.isDefined (); }) &&
709- " First row must contain only valid indices" );
710- IGC_ASSERT (ReferenceIt->isDefined () && " Reference index must be valid" );
706+ IGC_ASSERT_MESSAGE (std::distance (FirstIt, ReferenceIt) >= static_cast <std::ptrdiff_t >(FirstRowRegion.Width ),
707+ " Reference element must not be part of first row" );
708+ IGC_ASSERT_MESSAGE (std::all_of (FirstIt, std::next (FirstIt, FirstRowRegion.Width ), [](MaskIndex Elem) { return Elem.isDefined (); }),
709+ " First row must contain only valid indices" );
710+ IGC_ASSERT_MESSAGE (ReferenceIt->isDefined (), " Reference index must be valid" );
711711
712712 int Width = FirstRowRegion.Width ;
713713
@@ -741,15 +741,16 @@ template <typename ForwardIter>
741741Region matchMatrixRegionByIndexes (Region FirstRowRegion, ForwardIter FirstIt,
742742 ForwardIter LastIt, ForwardIter LastDefinedIt,
743743 int BoundIndex) {
744- IGC_ASSERT (FirstRowRegion.NumElements == FirstRowRegion.Width &&
745- FirstRowRegion.VStride == 0 &&
746- " wrong argunent: vector region (with no vstride) was expected" );
747- IGC_ASSERT (FirstIt->isDefined () && LastDefinedIt->isDefined () &&
748- " expected FirstIt and LastDefinedIt point to valid indices" );
749- // TODO: rewrite this assertion statement to remove VS build error
750- // IGC_ASSERT(std::distance(FirstIt, LastIt) >= FirstRowRegion.Width &&
751- // "wrong argument: number of indexes must be at least equal to region
752- // " "width");
744+ IGC_ASSERT_MESSAGE (FirstRowRegion.NumElements == FirstRowRegion.Width ,
745+ " wrong argunent: vector region (with no vstride) was expected" );
746+ IGC_ASSERT_MESSAGE (FirstRowRegion.VStride == 0 ,
747+ " wrong argunent: vector region (with no vstride) was expected" );
748+ IGC_ASSERT_MESSAGE (FirstIt->isDefined (),
749+ " expected FirstIt and LastDefinedIt point to valid indices" );
750+ IGC_ASSERT_MESSAGE (LastDefinedIt->isDefined (),
751+ " expected FirstIt and LastDefinedIt point to valid indices" );
752+ IGC_ASSERT_MESSAGE (std::distance (FirstIt, LastIt) >= static_cast <std::ptrdiff_t >(FirstRowRegion.Width ),
753+ " wrong argument: number of indexes must be at least equal to region width" );
753754
754755 auto FirstRowEndIt = std::next (FirstIt, FirstRowRegion.Width );
755756 if (FirstRowEndIt == LastIt)
@@ -808,9 +809,9 @@ Region matchMatrixRegionByIndexes(Region FirstRowRegion, ForwardIter FirstIt,
808809// <3;2,1> vstride=3, width=2, stride=1
809810ShuffleVectorAnalyzer::OperandRegionInfo
810811ShuffleVectorAnalyzer::getMaskRegionPrefix (int StartIdx) {
811- IGC_ASSERT (StartIdx >= 0 &&
812- StartIdx < static_cast <int >(SI->getShuffleMask ().size ()) &&
813- " Start index is out of bound" );
812+ IGC_ASSERT_MESSAGE (StartIdx >= 0 , " Start index is out of bound " );
813+ IGC_ASSERT_MESSAGE ( StartIdx < static_cast <int >(SI->getShuffleMask ().size ()),
814+ " Start index is out of bound" );
814815
815816 auto MaskVals = SI->getShuffleMask ();
816817 auto StartIt = std::next (MaskVals.begin (), StartIdx);
@@ -1127,8 +1128,9 @@ Value* IVSplitter::combineSplit(Value &V1, Value &V2, RegionType RT1,
11271128 bool Scalarize) {
11281129 const auto &DL = Inst.getDebugLoc ();
11291130
1130- IGC_ASSERT (V1.getType () == V2.getType () && V1.getType ()->isVectorTy () &&
1131- cast<VectorType>(V1.getType ())->getElementType ()->isIntegerTy (32 ));
1131+ IGC_ASSERT (V1.getType () == V2.getType ());
1132+ IGC_ASSERT (V1.getType ()->isVectorTy ());
1133+ IGC_ASSERT (cast<VectorType>(V1.getType ())->getElementType ()->isIntegerTy (32 ));
11321134
11331135 // create the write-regions
11341136 auto R1 = createSplitRegion (VI32Ty, RT1);
@@ -1153,16 +1155,17 @@ Value* IVSplitter::combineSplit(Value &V1, Value &V2, RegionType RT1,
11531155}
11541156Value *IVSplitter::combineLoHiSplit (const LoHiSplit &Split, const Twine &Name,
11551157 bool Scalarize) {
1156-
1157- IGC_ASSERT (Split.Lo && Split. Hi );
1158+ IGC_ASSERT (Split. Lo );
1159+ IGC_ASSERT (Split.Hi );
11581160
11591161 return combineSplit (*Split.Lo , *Split.Hi , RegionType::LoRegion,
11601162 RegionType::HiRegion, Name, Scalarize);
11611163}
11621164
11631165Value *IVSplitter::combineHalfSplit (const HalfSplit &Split, const Twine &Name,
11641166 bool Scalarize) {
1165- IGC_ASSERT (Split.Left && Split.Right );
1167+ IGC_ASSERT (Split.Left );
1168+ IGC_ASSERT (Split.Right );
11661169
11671170 return combineSplit (*Split.Left , *Split.Right , RegionType::FirstHalf,
11681171 RegionType::SecondHalf, Name, Scalarize);
@@ -1728,8 +1731,8 @@ genx::ConstraintType genx::getInlineAsmConstraintType(StringRef Codes) {
17281731
17291732unsigned
17301733genx::getInlineAsmMatchedOperand (const InlineAsm::ConstraintInfo &Info) {
1731- IGC_ASSERT (genx::isInlineAsmMatchingInputConstraint (Info) &&
1732- " Matching input expected" );
1734+ IGC_ASSERT_MESSAGE (genx::isInlineAsmMatchingInputConstraint (Info),
1735+ " Matching input expected" );
17331736 int OperandValue = std::stoi (Info.Codes .front ());
17341737 IGC_ASSERT (OperandValue >= 0 );
17351738 return OperandValue;
@@ -1739,15 +1742,18 @@ std::vector<GenXInlineAsmInfo> genx::getGenXInlineAsmInfo(MDNode *MD) {
17391742 std::vector<GenXInlineAsmInfo> Result;
17401743 for (auto &MDOp : MD->operands ()) {
17411744 auto EntryMD = dyn_cast<MDTuple>(MDOp);
1742- IGC_ASSERT (EntryMD && EntryMD->getNumOperands () == 3 &&
1743- " error setting metadata for inline asm" );
1745+ IGC_ASSERT_MESSAGE (EntryMD, " error setting metadata for inline asm" );
1746+ IGC_ASSERT_MESSAGE (EntryMD->getNumOperands () == 3 ,
1747+ " error setting metadata for inline asm" );
17441748 ConstantAsMetadata *Op0 =
17451749 dyn_cast<ConstantAsMetadata>(EntryMD->getOperand (0 ));
17461750 ConstantAsMetadata *Op1 =
17471751 dyn_cast<ConstantAsMetadata>(EntryMD->getOperand (1 ));
17481752 ConstantAsMetadata *Op2 =
17491753 dyn_cast<ConstantAsMetadata>(EntryMD->getOperand (2 ));
1750- IGC_ASSERT (Op0 && Op1 && Op2 && " error setting metadata for inline asm" );
1754+ IGC_ASSERT_MESSAGE (Op0, " error setting metadata for inline asm" );
1755+ IGC_ASSERT_MESSAGE (Op1, " error setting metadata for inline asm" );
1756+ IGC_ASSERT_MESSAGE (Op2, " error setting metadata for inline asm" );
17511757 auto CTy = static_cast <genx::ConstraintType>(
17521758 cast<ConstantInt>(Op0->getValue ())->getZExtValue ());
17531759 Result.emplace_back (CTy, cast<ConstantInt>(Op1->getValue ())->getSExtValue (),
@@ -1757,13 +1763,13 @@ std::vector<GenXInlineAsmInfo> genx::getGenXInlineAsmInfo(MDNode *MD) {
17571763}
17581764
17591765std::vector<GenXInlineAsmInfo> genx::getGenXInlineAsmInfo (CallInst *CI) {
1760- IGC_ASSERT (CI->isInlineAsm () && " Inline asm expected" );
1766+ IGC_ASSERT_MESSAGE (CI->isInlineAsm (), " Inline asm expected" );
17611767 MDNode *MD = CI->getMetadata (genx::MD_genx_inline_asm_info);
17621768 // empty constraint info
17631769 if (!MD) {
17641770 auto *IA = cast<InlineAsm>(IGCLLVM::getCalledValue (CI));
1765- IGC_ASSERT (IA->getConstraintString ().empty () &&
1766- " No info only for empty constraint string" );
1771+ IGC_ASSERT_MESSAGE (IA->getConstraintString ().empty (),
1772+ " No info only for empty constraint string" );
17671773 (void )IA;
17681774 return std::vector<GenXInlineAsmInfo>();
17691775 }
@@ -1779,7 +1785,7 @@ bool genx::hasConstraintOfType(
17791785}
17801786
17811787unsigned genx::getInlineAsmNumOutputs (CallInst *CI) {
1782- IGC_ASSERT (CI->isInlineAsm () && " Inline asm expected" );
1788+ IGC_ASSERT_MESSAGE (CI->isInlineAsm (), " Inline asm expected" );
17831789 unsigned NumOutputs;
17841790 if (CI->getType ()->isVoidTy ())
17851791 NumOutputs = 0 ;
@@ -1796,8 +1802,8 @@ unsigned genx::getInlineAsmNumOutputs(CallInst *CI) {
17961802 */
17971803Type *genx::getCorrespondingVectorOrScalar (Type *Ty) {
17981804 if (Ty->isVectorTy ()) {
1799- IGC_ASSERT (cast<VectorType>(Ty)->getNumElements () == 1 &&
1800- " wrong argument: scalar or degenerate vector is expected" );
1805+ IGC_ASSERT_MESSAGE (cast<VectorType>(Ty)->getNumElements () == 1 ,
1806+ " wrong argument: scalar or degenerate vector is expected" );
18011807 return Ty->getScalarType ();
18021808 }
18031809 return IGCLLVM::FixedVectorType::get (Ty, 1 );
@@ -1916,9 +1922,8 @@ unsigned genx::ceilLogAlignment(unsigned LogAlignment, unsigned GRFWidth) {
19161922}
19171923
19181924bool genx::isWrPredRegionLegalSetP (const CallInst &WrPredRegion) {
1919- IGC_ASSERT (GenXIntrinsic::getGenXIntrinsicID (&WrPredRegion) ==
1920- GenXIntrinsic::genx_wrpredregion &&
1921- " wrong argument: wrpredregion intrinsic was expected" );
1925+ IGC_ASSERT_MESSAGE (GenXIntrinsic::getGenXIntrinsicID (&WrPredRegion) == GenXIntrinsic::genx_wrpredregion,
1926+ " wrong argument: wrpredregion intrinsic was expected" );
19221927 auto &NewValue = *WrPredRegion.getOperand (WrPredRegionOperand::NewValue);
19231928 auto ExecSize = NewValue.getType ()->isVectorTy ()
19241929 ? cast<VectorType>(NewValue.getType ())->getNumElements ()
@@ -1944,7 +1949,8 @@ CallInst *genx::checkFunctionCall(Value *V, Function *F) {
19441949
19451950Value *genx::breakConstantVector (ConstantVector *CV, Instruction *CurInst,
19461951 Instruction *InsertPt) {
1947- IGC_ASSERT (CurInst && InsertPt);
1952+ IGC_ASSERT (CurInst);
1953+ IGC_ASSERT (InsertPt);
19481954 if (!CV)
19491955 return nullptr ;
19501956 // Splat case.
@@ -2038,7 +2044,7 @@ bool genx::breakConstantExprs(Function *F) {
20382044unsigned genx::getNumGRFsPerIndirectForRegion (const genx::Region &R,
20392045 const GenXSubtarget *ST,
20402046 bool Allow2D) {
2041- IGC_ASSERT (R.Indirect && " Indirect region expected" );
2047+ IGC_ASSERT_MESSAGE (R.Indirect , " Indirect region expected" );
20422048 IGC_ASSERT (ST);
20432049 if (ST->hasIndirectGRFCrossing () &&
20442050 // SKL+. See if we can allow GRF crossing.
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