Small refactor to vISA emit pass.

weiyu-chen · sys_zuul · commit c7505e6cb20f · 2020-02-06T08:14:52.000-08:00
Change-Id: I916c06cf4dd3e7e2b3571b71b6f165b880e6f9f5
diff --git a/IGC/Compiler/CISACodeGen/EmitVISAPass.cpp b/IGC/Compiler/CISACodeGen/EmitVISAPass.cpp
@@ -8729,6 +8729,8 @@ void EmitPass::emitExtract(llvm::Instruction* inst)
             pOffset3 = pOffset2;
         }
 
+        {
+
 
             // address variable represents register a0
             CVariable* pDstArrElm = m_currShader->GetNewAddressVariable(
@@ -8744,6 +8746,7 @@ void EmitPass::emitExtract(llvm::Instruction* inst)
             // finally, we move the indirectly addressed values to the destination register
             m_encoder->Copy(m_destination, pDstArrElm);
             m_encoder->Push();
+        }
     }
 }
 
@@ -11172,7 +11175,7 @@ void EmitPass::emitReductionClustered(const e_opcode op, const uint64_t identity
 
     const auto dispatchSize = static_cast<decltype(clusterSize)>(
         numLanes(m_currShader->m_dispatchSize));
-    const bool isSimd32 = m_currShader->m_dispatchSize == SIMDMode::SIMD32;
+    const bool isSimd32 = m_currShader->m_numberInstance == 2;
     const bool useReduceAll = clusterSize >= dispatchSize;
 
     if(clusterSize == 1)

Original file line number	Diff line number	Diff line change
`@@ -8729,6 +8729,8 @@ void EmitPass::emitExtract(llvm::Instruction* inst)`
`8729`	`8729`	`pOffset3 = pOffset2;`
`8730`	`8730`	`}`
`8731`	`8731`
	`8732`	`+ {`
	`8733`	`+`
`8732`	`8734`
`8733`	`8735`	`// address variable represents register a0`
`8734`	`8736`	`CVariable* pDstArrElm = m_currShader->GetNewAddressVariable(`
`@@ -8744,6 +8746,7 @@ void EmitPass::emitExtract(llvm::Instruction* inst)`
`8744`	`8746`	`// finally, we move the indirectly addressed values to the destination register`
`8745`	`8747`	`m_encoder->Copy(m_destination, pDstArrElm);`
`8746`	`8748`	`m_encoder->Push();`
	`8749`	`+ }`
`8747`	`8750`	`}`
`8748`	`8751`	`}`
`8749`	`8752`
`@@ -11172,7 +11175,7 @@ void EmitPass::emitReductionClustered(const e_opcode op, const uint64_t identity`
`11172`	`11175`
`11173`	`11176`	`const auto dispatchSize = static_cast<decltype(clusterSize)>(`
`11174`	`11177`	`numLanes(m_currShader->m_dispatchSize));`
`11175`		`- const bool isSimd32 = m_currShader->m_dispatchSize == SIMDMode::SIMD32;`
	`11178`	`+ const bool isSimd32 = m_currShader->m_numberInstance == 2;`
`11176`	`11179`	`const bool useReduceAll = clusterSize >= dispatchSize;`
`11177`	`11180`
`11178`	`11181`	`if(clusterSize == 1)`