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pratikasharpratikashar
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[Autobackout][FuncReg]Revert of change: df5bff0
Make spill/fill and spill cleanup modules emit spill/fill intrinsics instead of send message HSD/Radar: n/a Change-Id: Iae83aacbf7016667051b294f36a698abf80b3554
1 parent 95cc9c3 commit c9db13d

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9 files changed

+332
-436
lines changed

9 files changed

+332
-436
lines changed

‎visa/BuildIR.h‎

Lines changed: 7 additions & 38 deletions
Original file line numberDiff line numberDiff line change
@@ -1099,59 +1099,28 @@ class IR_Builder {
10991099
return inst;
11001100
}
11011101

1102-
G4_INST* createSpill(G4_DstRegRegion* dst, G4_SrcRegRegion* header, G4_SrcRegRegion* payload, unsigned int execSize,
1103-
uint16_t numRows, uint32_t offset, G4_Declare* fp, G4_InstOption option, unsigned int lineno = 0, int CISAoff = -1,
1104-
const char* srcFilename = nullptr)
1105-
{
1106-
G4_INST* spill = createIntrinsicInst(nullptr, Intrinsic::Spill, execSize, dst,
1107-
header, payload, nullptr, option, lineno);
1108-
spill->asSpillIntrinsic()->setSrcFilename(srcFilename);
1109-
spill->asSpillIntrinsic()->setCISAOff(CISAoff);
1110-
spill->asSpillIntrinsic()->setFP(fp);
1111-
spill->asSpillIntrinsic()->setOffset(offset);
1112-
spill->asSpillIntrinsic()->setNumRows(numRows);
1113-
return spill;
1114-
}
1115-
1116-
G4_INST* createSpill(G4_DstRegRegion* dst, G4_SrcRegRegion* payload, unsigned int execSize, uint16_t numRows, uint32_t offset,
1117-
G4_Declare* fp, G4_InstOption option, unsigned int lineno = 0, int CISAoff = -1, const char* srcFilename = nullptr)
1102+
G4_INST* createSpill(G4_SrcRegRegion* payload, uint16_t numRows, uint32_t offset, G4_Declare* fp, G4_InstOption option,
1103+
unsigned int lineno = 0, int CISAoff = -1, const char* srcFilename = nullptr)
11181104
{
11191105
auto builtInR0 = getBuiltinR0();
11201106
auto rd = getRegionStride1();
11211107
auto srcRgnr0 = createSrcRegRegion(Mod_src_undef, Direct, builtInR0->getRegVar(), 0, 0, rd, Type_UD);
1122-
G4_INST* spill = createIntrinsicInst(nullptr, Intrinsic::Spill, execSize, dst,
1123-
srcRgnr0, payload, nullptr, option, lineno);
1124-
spill->asSpillIntrinsic()->setSrcFilename(srcFilename);
1125-
spill->asSpillIntrinsic()->setCISAOff(CISAoff);
1108+
G4_INST* spill = createInternalIntrinsicInst(nullptr, Intrinsic::Spill, 1, createNullDst(G4_Type::Type_UD),
1109+
srcRgnr0, payload, nullptr, option, lineno, CISAoff, srcFilename);
11261110
spill->asSpillIntrinsic()->setFP(fp);
11271111
spill->asSpillIntrinsic()->setOffset(offset);
11281112
spill->asSpillIntrinsic()->setNumRows(numRows);
11291113
return spill;
11301114
}
11311115

1132-
G4_INST* createFill(G4_SrcRegRegion* header, G4_DstRegRegion* dstData, unsigned int execSize, uint16_t numRows, uint32_t offset,
1133-
G4_Declare* fp, G4_InstOption option, unsigned int lineno = 0, int CISAoff = -1, const char* srcFilename = nullptr)
1134-
{
1135-
G4_INST* fill = createIntrinsicInst(nullptr, Intrinsic::Fill, execSize, dstData,
1136-
header, nullptr, nullptr, option, lineno);
1137-
fill->asFillIntrinsic()->setSrcFilename(srcFilename);
1138-
fill->asFillIntrinsic()->setCISAOff(CISAoff);
1139-
fill->asFillIntrinsic()->setFP(fp);
1140-
fill->asFillIntrinsic()->setOffset(offset);
1141-
fill->asFillIntrinsic()->setNumRows(numRows);
1142-
return fill;
1143-
}
1144-
1145-
G4_INST* createFill(G4_DstRegRegion* dstData, unsigned int execSize, uint16_t numRows, uint32_t offset, G4_Declare* fp , G4_InstOption option,
1116+
G4_INST* createFill(G4_DstRegRegion* dstData, uint16_t numRows, uint32_t offset, G4_Declare* fp , G4_InstOption option,
11461117
unsigned int lineno = 0, int CISAoff = -1, const char* srcFilename = nullptr)
11471118
{
11481119
auto builtInR0 = getBuiltinR0();
11491120
auto rd = getRegionStride1();
11501121
auto srcRgnr0 = createSrcRegRegion(Mod_src_undef, Direct, builtInR0->getRegVar(), 0, 0, rd, Type_UD);
1151-
G4_INST* fill = createIntrinsicInst(nullptr, Intrinsic::Fill, execSize, dstData,
1152-
srcRgnr0, nullptr, nullptr, option, lineno);
1153-
fill->asFillIntrinsic()->setSrcFilename(srcFilename);
1154-
fill->asFillIntrinsic()->setCISAOff(CISAoff);
1122+
G4_INST* fill = createInternalIntrinsicInst(nullptr, Intrinsic::Fill, 1, dstData,
1123+
srcRgnr0, nullptr, nullptr, option, lineno, CISAoff, srcFilename);
11551124
fill->asFillIntrinsic()->setFP(fp);
11561125
fill->asFillIntrinsic()->setOffset(offset);
11571126
fill->asFillIntrinsic()->setNumRows(numRows);

‎visa/Gen4_IR.cpp‎

Lines changed: 0 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -7033,16 +7033,6 @@ void G4_INST::computeRightBound(G4_Operand* opnd)
70337033

70347034
done = true;
70357035
}
7036-
else if (done == false && isFillIntrinsic())
7037-
{
7038-
asFillIntrinsic()->computeRightBound(opnd);
7039-
done = true;
7040-
}
7041-
else if (done == false && isSpillIntrinsic())
7042-
{
7043-
asSpillIntrinsic()->computeRightBound(opnd);
7044-
done = true;
7045-
}
70467036

70477037
if( done == false )
70487038
{

‎visa/Gen4_IR.hpp‎

Lines changed: 3 additions & 58 deletions
Original file line numberDiff line numberDiff line change
@@ -1424,7 +1424,7 @@ static const IntrinsicInfo G4_Intrinsics[(int)Intrinsic::NumIntrinsics] =
14241424
{Intrinsic::Wait, "wait", 0, 0, Phase::Optimizer, { 0, 0, 0, false, false } },
14251425
{Intrinsic::Use, "use", 0, 1, Phase::Scheduler, { 0, 0, 0, false, false } },
14261426
{Intrinsic::MemFence, "mem_fence", 0, 0, Phase::BinaryEncoding, { 0, 0, 0, false, false } },
1427-
{Intrinsic::PseudoKill, "pseudo_kill", 1, 1, Phase::RA, { 0, 0, 0, false, false} },
1427+
{Intrinsic::PseudoKill, "pseudo_kill", 1, 1, Phase::RA, { 0, 0, 0, false, false } },
14281428
{Intrinsic::Spill, "spill", 1, 2, Phase::RA, { 0, 0, 0, false, false } },
14291429
{Intrinsic::Fill, "fill", 1, 1, Phase::RA, { 0, 0, 0, false, false } }
14301430
};
@@ -1951,8 +1951,6 @@ class G4_Operand
19511951
{
19521952
friend class G4_INST;
19531953
friend class G4_InstSend;
1954-
friend class G4_FillIntrinsic;
1955-
friend class G4_SpillIntrinsic;
19561954

19571955
public:
19581956
enum Kind {
@@ -3828,22 +3826,6 @@ inline const char* G4_InstCF::getUipLabelStr() const
38283826
return uip->asLabel()->getLabel();
38293827
}
38303828

3831-
static void computeSpillFillOperandBound(G4_Operand* opnd, unsigned int LB, int numReg)
3832-
{
3833-
if (numReg == 0)
3834-
{
3835-
return;
3836-
}
3837-
3838-
// read/write in units of GRF.
3839-
unsigned RB = std::min(opnd->getTopDcl()->getByteSize(),
3840-
LB + numReg * G4_GRF_REG_NBYTES) - 1;
3841-
3842-
unsigned NBytes = RB - LB + 1;
3843-
opnd->setBitVecFromSize(NBytes);
3844-
opnd->setRightBound(RB);
3845-
}
3846-
38473829
class G4_SpillIntrinsic : public G4_InstIntrinsic
38483830
{
38493831
public:
@@ -3862,8 +3844,6 @@ class G4_SpillIntrinsic : public G4_InstIntrinsic
38623844

38633845
}
38643846

3865-
const static unsigned int InvalidOffset = 0xffffffff;
3866-
38673847
bool isOffBP() const { return getFP() != nullptr; }
38683848

38693849
uint32_t getNumRows() const { return numRows; }
@@ -3874,26 +3854,10 @@ class G4_SpillIntrinsic : public G4_InstIntrinsic
38743854
void setOffset(uint32_t o) { offset = o; }
38753855
void setFP(G4_Declare* f) { fp = f; }
38763856

3877-
bool isOffsetValid() { return offset != InvalidOffset; }
3878-
3879-
void computeRightBound(G4_Operand* opnd)
3880-
{
3881-
uint16_t numReg = 0;
3882-
if (opnd == getSrc(1))
3883-
{
3884-
numReg = asSpillIntrinsic()->getNumRows();
3885-
}
3886-
else if (opnd->isSrcRegRegion() && opnd == getSrc(0))
3887-
{
3888-
numReg = 1;
3889-
}
3890-
computeSpillFillOperandBound(opnd, opnd->left_bound, numReg);
3891-
}
3892-
38933857
private:
38943858
G4_Declare* fp = nullptr;
38953859
uint32_t numRows = 0;
3896-
uint32_t offset = InvalidOffset;
3860+
uint32_t offset = 0;
38973861
};
38983862

38993863
class G4_FillIntrinsic : public G4_InstIntrinsic
@@ -3914,8 +3878,6 @@ class G4_FillIntrinsic : public G4_InstIntrinsic
39143878

39153879
}
39163880

3917-
const static unsigned int InvalidOffset = 0xffffffff;
3918-
39193881
bool isOffBP() const { return getFP() != nullptr; }
39203882

39213883
uint32_t getNumRows() const { return numRows; }
@@ -3926,27 +3888,10 @@ class G4_FillIntrinsic : public G4_InstIntrinsic
39263888
void setOffset(uint32_t o) { offset = o; }
39273889
void setFP(G4_Declare* f) { fp = f; }
39283890

3929-
bool isOffsetValid() { return offset != InvalidOffset; }
3930-
3931-
void computeRightBound(G4_Operand* opnd)
3932-
{
3933-
uint16_t numReg = 0;
3934-
if (opnd == getDst())
3935-
{
3936-
numReg = asFillIntrinsic()->getNumRows();
3937-
}
3938-
else if (opnd->isSrcRegRegion() &&
3939-
(opnd == getSrc(0) || opnd == getSrc(1)))
3940-
{
3941-
numReg = 1;
3942-
}
3943-
computeSpillFillOperandBound(opnd, opnd->left_bound, numReg);
3944-
}
3945-
39463891
private:
39473892
G4_Declare* fp = nullptr;
39483893
uint32_t numRows = 0;
3949-
uint32_t offset = InvalidOffset;
3894+
uint32_t offset = 0;
39503895
};
39513896

39523897
} // namespace vISA

‎visa/GraphColor.cpp‎

Lines changed: 4 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -1899,7 +1899,7 @@ void Interference::buildInterferenceWithinBB(G4_BB* bb, BitSet& live)
18991899
}
19001900
}
19011901

1902-
if ((inst->isSend() || inst->isFillIntrinsic()) && !dst->isNullReg())
1902+
if (inst->isSend() && !dst->isNullReg())
19031903
{
19041904
if (VISA_WA_CHECK(kernel.fg.builder->getPWaTable(), WaDisableSendSrcDstOverlap))
19051905
{
@@ -6170,16 +6170,14 @@ void GraphColor::saveRegs(
61706170
{
61716171
// add (1) r126.2<1>:ud r125.7<0;1,0>:ud 0x2:ud
61726172
// sends (8) null<1>:ud r126.0 r1.0 ...
6173-
uint8_t execSize = (owordSize > 2) ? 16 : 8;
61746173
unsigned messageLength = owordSize / 2;
61756174
G4_Declare* msgDcl = builder.createTempVar(messageLength * GENX_DATAPORT_IO_SZ,
61766175
Type_UD, GRFALIGN, StackCallStr);
61776176
msgDcl->getRegVar()->setPhyReg(regPool.getGreg(startReg), 0);
61786177
auto sendSrc2 = builder.createSrcRegRegion(Mod_src_undef, Direct, msgDcl->getRegVar(), 0, 0,
61796178
builder.getRegionStride1(), Type_UD);
6180-
G4_DstRegRegion* dst = builder.createNullDst((execSize > 8) ? Type_UW : Type_UD);
61816179
MUST_BE_TRUE(frameOwordOffset % 2 == 0, "Frame oword offset is not aligned on 32-byte boundary");
6182-
auto spillIntrinsic = builder.createSpill(dst, sendSrc2, execSize, messageLength, frameOwordOffset/2, framePtr, InstOpt_WriteEnable);
6180+
auto spillIntrinsic = builder.createSpill(sendSrc2, messageLength, frameOwordOffset/2, framePtr, InstOpt_WriteEnable);
61836181
bb->insert(insertIt, spillIntrinsic);
61846182
}
61856183
else if (owordSize > 8)
@@ -6261,7 +6259,7 @@ void GraphColor::restoreRegs(
62616259
G4_DstRegRegion* dstRgn = builder.createDstRegRegion(Direct, dstDcl->getRegVar(), 0, 0, 1, (execSize > 8) ? Type_UW : Type_UD);
62626260

62636261
MUST_BE_TRUE(frameOwordOffset % 2 == 0, "Frame oword offset not aligned to 32-byte boundary");
6264-
auto fillIntrinsic = builder.createFill(dstRgn, execSize, responseLength, frameOwordOffset / 2, framePtr, InstOpt_WriteEnable);
6262+
auto fillIntrinsic = builder.createFill(dstRgn, responseLength, frameOwordOffset / 2, framePtr, InstOpt_WriteEnable);
62656263
bb->insert(insertIt, fillIntrinsic);
62666264
}
62676265
//
@@ -8917,8 +8915,7 @@ int GlobalRA::coloringRegAlloc()
89178915
#endif
89188916
bool disableSpillCoalecse = builder.getOption(vISA_DisableSpillCoalescing) ||
89198917
builder.getOption(vISA_FastSpill) || builder.getOption(vISA_Debug);
8920-
if (!reserveSpillReg && !disableSpillCoalecse && builder.useSends() &&
8921-
!kernel.fg.getHasStackCalls() && !kernel.fg.getIsStackCallFunc())
8918+
if (!reserveSpillReg && !disableSpillCoalecse && builder.useSends())
89228919
{
89238920
CoalesceSpillFills c(kernel, liveAnalysis, coloring, spillGMRF, iterationNo, rpe, *this);
89248921
c.run();

‎visa/Rematerialization.h‎

Lines changed: 0 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -199,19 +199,6 @@ namespace vISA
199199
return false;
200200
}
201201

202-
auto op = inst->opcode();
203-
if (op == G4_pseudo_callee_restore || op == G4_pseudo_callee_save ||
204-
op == G4_pseudo_caller_restore || op == G4_pseudo_caller_save)
205-
return false;
206-
207-
G4_Declare* dcl = nullptr;
208-
if (inst->getDst() && inst->getDst()->getTopDcl())
209-
dcl = inst->getDst()->getTopDcl();
210-
211-
if(kernel.fg.builder->isPreDefArg(dcl) || kernel.fg.builder->isPreDefRet(dcl) ||
212-
kernel.fg.builder->isPreDefFEStackVar(dcl))
213-
return false;
214-
215202
return true;
216203
}
217204

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