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[Autobackout][FunctionalRegression]Revert of change: e653864: Refactor SIMDInfo
Refactor SIMDInfo
1 parent ed8790f commit d166721

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8 files changed

+42
-84
lines changed

8 files changed

+42
-84
lines changed

‎IGC/AdaptorOCL/OCL/KernelAnnotations.hpp‎

Lines changed: 1 addition & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -324,11 +324,7 @@ struct ExecutionEnvironment
324324
DWORD WorkgroupWalkOrder[3] = {};
325325
bool HasGlobalAtomics = false;
326326
bool UseBindlessMode = false;
327-
uint32_t simd8_SIMDInfo = 0;
328-
uint32_t simd16_SIMDInfo = 0;
329-
uint32_t simd32_SIMDInfo = 0;
330-
uint32_t dual_simd8_SIMDInfo = 0;
331-
uint32_t quad_simd8_dynamic_SIMDInfo = 0;
327+
uint64_t SIMDInfo = 0;
332328
bool HasDPAS = false;
333329
bool HasRTCalls = false;
334330
DWORD StatelessWritesCount = 0;

‎IGC/AdaptorOCL/OCL/Patch/patch_parser.cpp‎

Lines changed: 2 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -937,20 +937,8 @@ void DebugPatchList(
937937
"\tHasStackCalls = %d\n",
938938
pPatchItem->HasStackCalls);
939939
ICBE_DPF_STR(output, GFXDBG_HARDWARE,
940-
"\tsimd8_SIMDInfo = %d\n",
941-
pPatchItem->simd8_SIMDInfo);
942-
ICBE_DPF_STR(output, GFXDBG_HARDWARE,
943-
"\tsimd16_SIMDInfo = %d\n",
944-
pPatchItem->simd16_SIMDInfo);
945-
ICBE_DPF_STR(output, GFXDBG_HARDWARE,
946-
"\tsimd32_SIMDInfo = %d\n",
947-
pPatchItem->simd32_SIMDInfo);
948-
ICBE_DPF_STR(output, GFXDBG_HARDWARE,
949-
"\tdual_simd8_SIMDInfo = %d\n",
950-
pPatchItem->dual_simd8_SIMDInfo);
951-
ICBE_DPF_STR(output, GFXDBG_HARDWARE,
952-
"\tquad_simd8_dynamic_SIMDInfo = %d\n",
953-
pPatchItem->quad_simd8_dynamic_SIMDInfo);
940+
"\tSIMDInfo = %lld\n",
941+
pPatchItem->SIMDInfo);
954942
ICBE_DPF_STR(output, GFXDBG_HARDWARE,
955943
"\tRequireDisableEUFusion = %s\n",
956944
pPatchItem->RequireDisableEUFusion ? "true" : "false");

‎IGC/AdaptorOCL/OCL/sp/sp_g8.cpp‎

Lines changed: 1 addition & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -2109,14 +2109,7 @@ RETVAL CGen8OpenCLStateProcessor::CreatePatchList(
21092109

21102110
patch.UseBindlessMode = annotations.m_executionEnvironment.UseBindlessMode;
21112111
patch.HasStackCalls = annotations.m_executionEnvironment.HasStackCalls;
2112-
2113-
// Copying simdinfo from ExecutionEnvironment to SPatchExecutionEnvironment
2114-
patch.simd8_SIMDInfo = annotations.m_executionEnvironment.simd8_SIMDInfo;
2115-
patch.simd16_SIMDInfo = annotations.m_executionEnvironment.simd16_SIMDInfo;
2116-
patch.simd32_SIMDInfo = annotations.m_executionEnvironment.simd32_SIMDInfo;
2117-
patch.dual_simd8_SIMDInfo = annotations.m_executionEnvironment.dual_simd8_SIMDInfo;
2118-
patch.quad_simd8_dynamic_SIMDInfo = annotations.m_executionEnvironment.quad_simd8_dynamic_SIMDInfo;
2119-
2112+
patch.SIMDInfo = annotations.m_executionEnvironment.SIMDInfo;
21202113
patch.RequireDisableEUFusion = annotations.m_executionEnvironment.RequireDisableEUFusion;
21212114

21222115
retValue = AddPatchItem(

‎IGC/AdaptorOCL/ocl_igc_shared/executable_format/patch_list.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -16,7 +16,7 @@ Abstract: Contains common patch structure definitions
1616

1717
namespace iOpenCL
1818
{
19-
const uint32_t CURRENT_ICBE_VERSION = 1083;
19+
const uint32_t CURRENT_ICBE_VERSION = 1082;
2020
const uint32_t MAGIC_CL = 0x494E5443; // 'I', 'N', 'T', 'C'
2121
const uint32_t INVALID_INDEX = 0xFFFFFFFF;
2222

‎IGC/AdaptorOCL/ocl_igc_shared/executable_format/patch_shared.h‎

Lines changed: 2 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -205,16 +205,12 @@ struct SPatchExecutionEnvironment :
205205
uint32_t IndirectStatelessCount;
206206
uint32_t UseBindlessMode;
207207
uint32_t HasStackCalls;
208+
uint64_t SIMDInfo;
208209
uint32_t RequireDisableEUFusion;
209-
uint32_t simd8_SIMDInfo;
210-
uint32_t simd16_SIMDInfo;
211-
uint32_t simd32_SIMDInfo;
212-
uint32_t dual_simd8_SIMDInfo;
213-
uint32_t quad_simd8_dynamic_SIMDInfo;
214210
};
215211

216212
// Update CURRENT_ICBE_VERSION when modifying the patch list
217-
static_assert( sizeof(SPatchExecutionEnvironment) == ( 148 + sizeof(SPatchItemHeader) ), "The size of SPatchExecutionEnvironment is not what is expected" );
213+
static_assert(sizeof(SPatchExecutionEnvironment) == (136 + sizeof(SPatchItemHeader)), "The size of SPatchExecutionEnvironment is not what is expected");
218214

219215
/*****************************************************************************\
220216
STRUCT: SPatchString

‎IGC/Compiler/CISACodeGen/OpenCLKernelCodeGen.cpp‎

Lines changed: 1 addition & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -2844,13 +2844,7 @@ namespace IGC
28442844
m_Context->SetSIMDInfo(SIMD_SELECTED, simdMode, ShaderDispatchMode::NOT_APPLICABLE);
28452845

28462846
m_kernelInfo.m_executionEnvironment.CompiledSIMDSize = numLanes(simdMode);
2847-
2848-
// Copying simdinfo from CodeGenContext to ExecutionEnvironment
2849-
m_kernelInfo.m_executionEnvironment.simd8_SIMDInfo = m_Context->GetSimd8SIMDInfo();
2850-
m_kernelInfo.m_executionEnvironment.simd16_SIMDInfo = m_Context->GetSimd16SIMDInfo();
2851-
m_kernelInfo.m_executionEnvironment.simd32_SIMDInfo = m_Context->GetSimd32SIMDInfo();
2852-
m_kernelInfo.m_executionEnvironment.dual_simd8_SIMDInfo = m_Context->GetDualSimd8SIMDInfo();
2853-
m_kernelInfo.m_executionEnvironment.quad_simd8_dynamic_SIMDInfo = m_Context->GetQuadSimd8DynamicSIMDInfo();
2847+
m_kernelInfo.m_executionEnvironment.SIMDInfo = m_Context->GetSIMDInfo();
28542848

28552849
m_kernelInfo.m_executionEnvironment.PerThreadPrivateMemoryUsage =
28562850
pOutput->m_UseScratchSpacePrivateMemory ?

‎IGC/Compiler/CodeGenContext.cpp‎

Lines changed: 1 addition & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -459,11 +459,7 @@ namespace IGC
459459
PRINT_CTX_MEMBER(m_NumGRFPerThread);
460460
PRINT_CTX_MEMBER(m_numPasses);
461461
PRINT_CTX_MEMBER(m_sampler);
462-
PRINT_CTX_MEMBER(m_simd8_SIMDInfo);
463-
PRINT_CTX_MEMBER(m_simd16_SIMDInfo);
464-
PRINT_CTX_MEMBER(m_simd32_SIMDInfo);
465-
PRINT_CTX_MEMBER(m_dual_simd8_SIMDInfo);
466-
PRINT_CTX_MEMBER(m_quad_simd8_dynamic_SIMDInfo);
462+
PRINT_CTX_MEMBER(m_SIMDInfo);
467463
PRINT_CTX_MEMBER(m_src1RemovedForBlendOpt);
468464
PRINT_CTX_MEMBER(m_tempCount);
469465
PRINT_CTX_MEMBER(m_threadCombiningOptDone);

‎IGC/Compiler/CodeGenPublic.h‎

Lines changed: 33 additions & 38 deletions
Original file line numberDiff line numberDiff line change
@@ -445,7 +445,16 @@ namespace IGC
445445
SIMD_SKIP_ML, // 8: skip this SIMD due to ML engine prediction.
446446
SIMD_FORCE_CONTENT, // 9: force this simd due to shader content (simd32 if WaveActive, barriers + interlocks)
447447
SIMD_FORCE_HINT, // 10: force this simd by hint(s) (now for WaveSize only)
448-
SIMD_INFO_RESERVED // 11: *** If new entry is added, make sure it still fits in each m_SIMDInfo Ex:m_simd8_SIMDInfo ***
448+
SIMD_INFO_RESERVED // 11: *** If new entry is added, make sure it still fits in m_SIMDInfo ***
449+
};
450+
451+
enum SIMDInfoOffset
452+
{
453+
SIMD8_OFFSET = 0,
454+
SIMD16_OFFSET = SIMD_INFO_RESERVED,
455+
SIMD32_OFFSET = SIMD_INFO_RESERVED*2,
456+
DUAL_SIMD8_OFFSET = SIMD_INFO_RESERVED * 3,
457+
QUAD_SIMD8_DYNAMIC_OFFSET = SIMD_INFO_RESERVED*6,
449458
};
450459

451460
struct SKernelProgram
@@ -483,11 +492,7 @@ namespace IGC
483492

484493
SSimplePushInfo simplePushInfoArr[g_c_maxNumberOfBufferPushed];
485494

486-
uint32_t simd8_SIMDInfo = 0;
487-
uint32_t simd16_SIMDInfo = 0;
488-
uint32_t simd32_SIMDInfo = 0;
489-
uint32_t dual_simd8_SIMDInfo = 0;
490-
uint32_t quad_simd8_dynamic_SIMDInfo = 0;
495+
uint64_t SIMDInfo = 0;
491496
void* m_StagingCtx;
492497
bool m_RequestStage2;
493498
};
@@ -1013,11 +1018,7 @@ namespace IGC
10131018
std::vector<int> m_gsNonDefaultIdxMap;
10141019
std::vector<int> m_psIdxMap;
10151020
DWORD LtoUsedMask = 0;
1016-
uint32_t m_simd8_SIMDInfo = 0;
1017-
uint32_t m_simd16_SIMDInfo = 0;
1018-
uint32_t m_simd32_SIMDInfo = 0;
1019-
uint32_t m_dual_simd8_SIMDInfo = 0;
1020-
uint32_t m_quad_simd8_dynamic_SIMDInfo = 0;
1021+
uint64_t m_SIMDInfo = 0;
10211022
uint32_t HdcEnableIndexSize = 0;
10221023
std::vector<RoutingIndex> HdcEnableIndexValues;
10231024

@@ -1063,7 +1064,7 @@ namespace IGC
10631064
const bool createResourceDimTypes = true,
10641065
LLVMContextWrapper* LLVMContext = nullptr)///< LLVM context to use, if null a new one will be created
10651066
: type(_type), platform(_platform), btiLayout(_bitLayout), m_DriverInfo(driverInfo),
1066-
llvmCtxWrapper(LLVMContext)
1067+
llvmCtxWrapper(LLVMContext), m_SIMDInfo(0)
10671068
{
10681069
if (llvmCtxWrapper == nullptr)
10691070
{
@@ -1165,63 +1166,57 @@ namespace IGC
11651166

11661167
bool isSWSubTriangleOpacityCullingEmulationEnabled() const;
11671168

1168-
enum Action { Set, Clear };
1169-
1170-
// ModifySIMDInfo is used by both Set and ClearSIMDInfo. Since Clear function doesn't have bit information, it defaults
1171-
// to SIMD_INFO_RESERVED if the argument is not passed. bit will not be used when action is Action::clear
1172-
void ModifySIMDInfo(SIMDMode simd, ShaderDispatchMode mode, Action action, SIMDInfoBit bit = SIMD_INFO_RESERVED)
1169+
unsigned int GetSIMDInfoOffset(SIMDMode simd, ShaderDispatchMode mode)
11731170
{
1174-
uint32_t bit_value = 1UL << bit;
1175-
bool clear = action == Action::Clear ? true : false;
1176-
switch (mode)
1177-
{
1171+
unsigned int offset = 0;
1172+
1173+
switch (mode) {
11781174
case ShaderDispatchMode::NOT_APPLICABLE:
1179-
switch (simd)
1180-
{
1175+
switch (simd) {
11811176
case SIMDMode::SIMD8:
1182-
m_simd8_SIMDInfo = clear ? 0 : m_simd8_SIMDInfo | bit_value;
1177+
offset = SIMD8_OFFSET;
11831178
break;
11841179
case SIMDMode::SIMD16:
1185-
m_simd16_SIMDInfo = clear ? 0 : m_simd16_SIMDInfo | bit_value;
1180+
offset = SIMD16_OFFSET;
11861181
break;
11871182
case SIMDMode::SIMD32:
1188-
m_simd32_SIMDInfo = clear ? 0 : m_simd32_SIMDInfo | bit_value;
1183+
offset = SIMD32_OFFSET;
11891184
break;
11901185
default:
1191-
IGC_ASSERT_MESSAGE(0, "Unknown SIMD Mode");
11921186
break;
11931187
}
11941188
break;
11951189

11961190
case ShaderDispatchMode::DUAL_SIMD8:
1197-
m_dual_simd8_SIMDInfo = clear ? 0 : m_dual_simd8_SIMDInfo | bit_value;
1191+
offset = DUAL_SIMD8_OFFSET;
11981192
break;
11991193
case ShaderDispatchMode::QUAD_SIMD8_DYNAMIC:
1200-
m_quad_simd8_dynamic_SIMDInfo = clear ? 0 : m_quad_simd8_dynamic_SIMDInfo | bit_value;
1194+
offset = QUAD_SIMD8_DYNAMIC_OFFSET;
12011195
break;
12021196

12031197
default:
1204-
IGC_ASSERT_MESSAGE(0, "Unknown SIMD Mode");
12051198
break;
12061199
}
1200+
IGC_ASSERT(offset < 64);
1201+
return offset;
12071202
}
12081203

12091204
void SetSIMDInfo(SIMDInfoBit bit, SIMDMode simd, ShaderDispatchMode mode)
12101205
{
1211-
IGC_ASSERT(bit < SIMD_INFO_RESERVED);
1212-
ModifySIMDInfo(simd, mode, Action::Set, bit);
1206+
unsigned int offset = GetSIMDInfoOffset(simd, mode);
1207+
unsigned int shift = bit + offset;
1208+
IGC_ASSERT(shift < 64);
1209+
m_SIMDInfo |= 1ULL << shift;
12131210
}
12141211

12151212
void ClearSIMDInfo(SIMDMode simd, ShaderDispatchMode mode)
12161213
{
1217-
ModifySIMDInfo(simd, mode, Action::Clear);
1214+
unsigned int offset = GetSIMDInfoOffset(simd, mode);
1215+
IGC_ASSERT(offset < 64);
1216+
m_SIMDInfo &= ~(0xffULL << offset);
12181217
}
12191218

1220-
uint32_t GetSimd8SIMDInfo() const { return m_simd8_SIMDInfo; }
1221-
uint32_t GetSimd16SIMDInfo() const { return m_simd16_SIMDInfo; }
1222-
uint32_t GetSimd32SIMDInfo() const { return m_simd32_SIMDInfo; }
1223-
uint32_t GetDualSimd8SIMDInfo() const { return m_dual_simd8_SIMDInfo; }
1224-
uint32_t GetQuadSimd8DynamicSIMDInfo() const { return m_quad_simd8_dynamic_SIMDInfo; }
1219+
uint64_t GetSIMDInfo() { return m_SIMDInfo; }
12251220

12261221
SIMDMode GetSIMDMode() const;
12271222

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