Extend morton walk order to loads

IGC marks a shader as "HasSample" to use Morton walk order for the
increased sampler cache hit rates. Currently, only sampler messages and
gather4 are supported. This PR expands to include loads with
ldmcsptr, ldmsptr, ldmsptr16bit.

For now, OCL support will stay as it is.

Author: iwwu

IGC/Compiler/CISACodeGen/EmitVISAPass.cpp

@@ -8820,6 +8820,7 @@ void EmitPass::emitLdmsInstruction(llvm::Instruction* inst)
 {
     uint numOperands = inst->getNumOperands();
     EOPCODE opCode = GetOpCode(inst);
+    m_currShader->m_State.SetHasLoadInst();
     //Subtract the offsets, and texture resource, lod to get
     //the number of texture coordinates and index to texture source
     uint numSources = numOperands - 5;

IGC/Compiler/CISACodeGen/GenericShaderState.hpp

@@ -50,9 +50,11 @@ namespace IGC
         void SetBarrierNumber(int BarrierNumber) { m_BarrierNumber = BarrierNumber; }
         int  GetBarrierNumber() const { return m_BarrierNumber; }
 
-        bool GetHasSample() const { return m_HasSample; }
-        void SetHasSampleInst()  { m_HasSampleInst = true;  m_HasSample = true; }
-        void SetHasGather4Inst() { m_HasGather4Inst = true; m_HasSample = true; }
+        bool GetHasSampleGather4Load() const { return (m_HasSampleInst || m_HasGather4Inst || m_HasLoadInst); }
+        bool GetHasSampleGather4()     const { return (m_HasSampleInst || m_HasGather4Inst); }
+        void SetHasSampleInst()  { m_HasSampleInst  = true; }
+        void SetHasGather4Inst() { m_HasGather4Inst = true; }
+        void SetHasLoadInst()    { m_HasLoadInst    = true; }
 
         bool GetHasDPAS() const { return m_HasDPAS; }
         void SetHasDPAS() { m_HasDPAS = true; }
@@ -115,9 +117,9 @@ namespace IGC
                 (NumInst < IGC_GET_FLAG_VALUE(MidThreadPreemptionDisableThreshold)));
         }
     private:
-        bool m_HasSample = false;
         bool m_HasSampleInst = false;
         bool m_HasGather4Inst = false;
+        bool m_HasLoadInst = false;
         int m_BarrierNumber = 0;
         bool m_HasDPAS = false;
         // Shader has LSC store messages with non-default L1 cache control

IGC/Compiler/CISACodeGen/OpenCLKernelCodeGen.cpp

@@ -2873,7 +2873,7 @@ namespace IGC
 
         // TODO: need to change misleading HasBarriers to NumberofBarriers
         m_kernelInfo.m_executionEnvironment.HasBarriers = m_State.GetBarrierNumber();
-        m_kernelInfo.m_executionEnvironment.HasSample = m_State.GetHasSample();
+        m_kernelInfo.m_executionEnvironment.HasSample = m_State.GetHasSampleGather4();
         m_kernelInfo.m_executionEnvironment.DisableMidThreadPreemption = GetDisableMidThreadPreemption();
         m_kernelInfo.m_executionEnvironment.SubgroupIndependentForwardProgressRequired =
             m_Context->getModuleMetaData()->compOpt.SubgroupIndependentForwardProgressRequired;