@@ -846,10 +846,12 @@ void BankConflictPass::setupBankConflictsforMad(G4_INST *inst) {
846846 G4_Declare *dcls[3 ];
847847 G4_Declare *opndDcls[3 ];
848848 BankConflict assignedBank = BANK_CONFLICT_NONE; // Flip for next
849+ bool fixedBank[3 ];
849850
850851 for (int i = 0 ; i < 3 ; i += 1 ) {
851852 dcls[i] = nullptr ;
852853 opndDcls[i] = nullptr ;
854+ fixedBank[i] = false ;
853855
854856 G4_Operand *src = inst->getSrc (i);
855857 if (!src || !src->isSrcRegRegion () || src->isAreg ()) {
@@ -863,6 +865,15 @@ void BankConflictPass::setupBankConflictsforMad(G4_INST *inst) {
863865 gra.kernel .numEltPerGRF <Type_UB>();
864866 srcBC[i] = gra.getBankConflict (dcls[i]);
865867
868+ if (dcls[i] && dcls[i]->getRegVar () &&
869+ dcls[i]->getRegVar ()->isPhyRegAssigned ()) {
870+ int regNum = dcls[i]->getRegVar ()->getPhyReg ()->asGreg ()->getRegNum ();
871+ srcBC[i] = regNum % 2 ? BANK_CONFLICT_SECOND_HALF_ODD
872+ : BANK_CONFLICT_FIRST_HALF_EVEN;
873+ gra.setBankConflict (dcls[i], srcBC[i]);
874+ fixedBank[i] = true ;
875+ }
876+
866877 if (srcBC[i] != BANK_CONFLICT_NONE) {
867878 if (isOddOffset (offset[i])) {
868879 if (srcBC[i] == BANK_CONFLICT_FIRST_HALF_EVEN) {
@@ -916,7 +927,7 @@ void BankConflictPass::setupBankConflictsforMad(G4_INST *inst) {
916927 }
917928
918929 srcBC[i] = gra.getBankConflict (dcls[i]);
919- if (srcBC[i] != BANK_CONFLICT_NONE) {
930+ if (!fixedBank[i] && srcBC[i] != BANK_CONFLICT_NONE) {
920931 if (isOddOffset (offset[i])) {
921932 if (srcBC[i] == BANK_CONFLICT_FIRST_HALF_EVEN) {
922933 srcBC[i] = BANK_CONFLICT_SECOND_HALF_ODD;
@@ -943,7 +954,7 @@ void BankConflictPass::setupBankConflictsforMad(G4_INST *inst) {
943954 : BANK_CONFLICT_FIRST_HALF_EVEN;
944955 }
945956 gra.setBankConflict (dcls[i], srcBC[i]);
946- } else {
957+ } else if (!fixedBank[i]) {
947958 srcBC[i] = (assignedBank == BANK_CONFLICT_FIRST_HALF_EVEN)
948959 ? BANK_CONFLICT_SECOND_HALF_ODD
949960 : BANK_CONFLICT_FIRST_HALF_EVEN;
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