@@ -117,6 +117,7 @@ typedef struct _SUscSkuFeatureTable
117117 unsigned int FtrPooledEuEnabled : 1 ;
118118
119119 unsigned int FtrResourceStreamer : 1 ;
120+ unsigned int FtrLocalMemory : 1 ;
120121} SUscSkuFeatureTable;
121122
122123USC_PARAM ()
@@ -166,8 +167,8 @@ typedef SCompilerPlatformInfo SUSCCompilerPlatformInfo;
166167 InitializeUscAdapterInfo
167168
168169Description:
169- Initializes the USC (slim) adapter info structure by coping required fields
170- from the big sku table and gtSystemInfo structure.
170+ Initializes the USC (slim) adapter info structure by coping required fields
171+ from the big sku table and gtSystemInfo structure.
171172 This is a helper function for USC clients.
172173
173174Input:
@@ -188,15 +189,15 @@ inline void InitializeUscAdapterInfo(
188189 SUscAdapterInfo &uscAdpaterInfo )
189190{
190191 uscAdpaterInfo.UscSkuFeatureTable .FtrDesktop = bigSkuTable.FtrDesktop ; // Whether Desktop
191-
192+
192193 uscAdpaterInfo.UscSkuFeatureTable .FtrGtBigDie = bigSkuTable.FtrGtBigDie ; // Indicates Big Die Silicon.
193194 uscAdpaterInfo.UscSkuFeatureTable .FtrGtMediumDie = bigSkuTable.FtrGtMediumDie ; // Indicates Medium Die Silicon.
194195 uscAdpaterInfo.UscSkuFeatureTable .FtrGtSmallDie = bigSkuTable.FtrGtSmallDie ; // Indicates Small Die Silicon.
195196 uscAdpaterInfo.UscSkuFeatureTable .FtrGT1 = bigSkuTable.FtrGT1 ; // Indicates GT1 part.
196197 uscAdpaterInfo.UscSkuFeatureTable .FtrGT1_5 = bigSkuTable.FtrGT1_5 ; // Indicates GT1.5 part.
197- uscAdpaterInfo.UscSkuFeatureTable .FtrGT2 = bigSkuTable.FtrGT2 ; // Indicates GT2 part.
198- uscAdpaterInfo.UscSkuFeatureTable .FtrGT3 = bigSkuTable.FtrGT3 ; // Indicates GT3 part.
199- uscAdpaterInfo.UscSkuFeatureTable .FtrGT4 = bigSkuTable.FtrGT4 ; // Indicates GT4 part.
198+ uscAdpaterInfo.UscSkuFeatureTable .FtrGT2 = bigSkuTable.FtrGT2 ; // Indicates GT2 part.
199+ uscAdpaterInfo.UscSkuFeatureTable .FtrGT3 = bigSkuTable.FtrGT3 ; // Indicates GT3 part.
200+ uscAdpaterInfo.UscSkuFeatureTable .FtrGT4 = bigSkuTable.FtrGT4 ; // Indicates GT4 part.
200201 uscAdpaterInfo.UscSkuFeatureTable .FtrGTL = bigSkuTable.FtrGT1 ; // Indicates GT Low-end performance part.
201202 uscAdpaterInfo.UscSkuFeatureTable .FtrGTM = bigSkuTable.FtrGT2 ; // Indicates GT Medium performance part.
202203 uscAdpaterInfo.UscSkuFeatureTable .FtrGTH = bigSkuTable.FtrGT3 ; // Indicates GT High-end performance part.
@@ -205,12 +206,13 @@ inline void InitializeUscAdapterInfo(
205206 uscAdpaterInfo.UscSkuFeatureTable .FtrGTC = bigSkuTable.FtrGTC ; // Indicates a Gen9 based LCLP Broxton platform C.
206207 uscAdpaterInfo.UscSkuFeatureTable .FtrGTX = bigSkuTable.FtrGTX ; // Indicates a Gen9 based LCLP Broxton platform X.
207208 uscAdpaterInfo.UscSkuFeatureTable .Ftr5Slice = bigSkuTable.Ftr5Slice ; // Indicates KBL 15x8 SKU HALO Sku
208- uscAdpaterInfo.UscSkuFeatureTable .FtrGpGpuMidThreadLevelPreempt = bigSkuTable.FtrGpGpuMidThreadLevelPreempt ; // Indicates if preEmption is enabled (HSW+)
209- uscAdpaterInfo.UscSkuFeatureTable .FtrIoMmuPageFaulting = bigSkuTable.FtrIoMmuPageFaulting ; // Indicates if page faulting is enabled.
209+ uscAdpaterInfo.UscSkuFeatureTable .FtrGpGpuMidThreadLevelPreempt = bigSkuTable.FtrGpGpuMidThreadLevelPreempt ; // Indicates if preEmption is enabled (HSW+)
210+ uscAdpaterInfo.UscSkuFeatureTable .FtrIoMmuPageFaulting = bigSkuTable.FtrIoMmuPageFaulting ; // Indicates if page faulting is enabled.
210211 uscAdpaterInfo.UscSkuFeatureTable .FtrWddm2Svm = bigSkuTable.FtrWddm2Svm ;
211212 uscAdpaterInfo.UscSkuFeatureTable .FtrPooledEuEnabled = bigSkuTable.FtrPooledEuEnabled ;
212213 uscAdpaterInfo.UscSkuFeatureTable .FtrResourceStreamer = bigSkuTable.FtrResourceStreamer ;
213-
214+ uscAdpaterInfo.UscSkuFeatureTable .FtrLocalMemory = bigSkuTable.FtrLocalMemory ;
215+
214216 uscAdpaterInfo.UscGTSystemInfo .EUCount = bigGTSystemInfo.EUCount ;
215217 uscAdpaterInfo.UscGTSystemInfo .ThreadCount = bigGTSystemInfo.ThreadCount ;
216218 uscAdpaterInfo.UscGTSystemInfo .SliceCount = bigGTSystemInfo.SliceCount ;
@@ -236,7 +238,7 @@ inline void InitializeUscAdapterInfo(
236238 InitializeUscSkuTable
237239
238240Description:
239- Initializes the USC (slim) sku table by coping required fields from the big
241+ Initializes the USC (slim) sku table by coping required fields from the big
240242 sku table. This is a helper function for USC clients.
241243
242244Input:
@@ -260,15 +262,15 @@ inline void InitializeUscSkuTable(
260262{
261263 uscSkuTable.FtrDesktop = bigSkuTable.FtrDesktop ; // Whether Desktop
262264 uscSkuTable.FtrChannelSwizzlingXOREnabled = bigSkuTable.FtrChannelSwizzlingXOREnabled ; // Indicates Channel Swizzling XOR feature support
263-
265+
264266 uscSkuTable.FtrGtBigDie = bigSkuTable.FtrGtBigDie ; // Indicates Big Die Silicon.
265267 uscSkuTable.FtrGtMediumDie = bigSkuTable.FtrGtMediumDie ; // Indicates Medium Die Silicon.
266268 uscSkuTable.FtrGtSmallDie = bigSkuTable.FtrGtSmallDie ; // Indicates Small Die Silicon.
267269 uscSkuTable.FtrGT1 = bigSkuTable.FtrGT1 ; // Indicates GT1 part.
268270 uscSkuTable.FtrGT1_5 = bigSkuTable.FtrGT1_5 ; // Indicates GT1.5 part.
269- uscSkuTable.FtrGT2 = bigSkuTable.FtrGT2 ; // Indicates GT2 part.
270- uscSkuTable.FtrGT3 = bigSkuTable.FtrGT3 ; // Indicates GT3 part.
271- uscSkuTable.FtrGT4 = bigSkuTable.FtrGT4 ; // Indicates GT4 part.
271+ uscSkuTable.FtrGT2 = bigSkuTable.FtrGT2 ; // Indicates GT2 part.
272+ uscSkuTable.FtrGT3 = bigSkuTable.FtrGT3 ; // Indicates GT3 part.
273+ uscSkuTable.FtrGT4 = bigSkuTable.FtrGT4 ; // Indicates GT4 part.
272274 uscSkuTable.FtrGTL = bigSkuTable.FtrGT1 ; // Indicates GT Low-end performance part.
273275 uscSkuTable.FtrGTM = bigSkuTable.FtrGT2 ; // Indicates GT Medium performance part.
274276 uscSkuTable.FtrGTH = bigSkuTable.FtrGT3 ; // Indicates GT High-end performance part.
@@ -277,8 +279,9 @@ inline void InitializeUscSkuTable(
277279 uscSkuTable.FtrGTC = bigSkuTable.FtrGTC ; // Indicates a Gen9 based LCLP Broxton platform C.
278280 uscSkuTable.FtrGTX = bigSkuTable.FtrGTX ; // Indicates a Gen9 based LCLP Broxton platform X.
279281 uscSkuTable.Ftr5Slice = bigSkuTable.Ftr5Slice ; // Indicates KBL 15x8 SKU HALO Sku
280- uscSkuTable.FtrGpGpuMidThreadLevelPreempt = bigSkuTable.FtrGpGpuMidThreadLevelPreempt ; // Indicates if preEmption is enabled (HSW+)
281- uscSkuTable.FtrIoMmuPageFaulting = bigSkuTable.FtrIoMmuPageFaulting ; // Indicates if page faulting is enabled.
282+ uscSkuTable.FtrGpGpuMidThreadLevelPreempt = bigSkuTable.FtrGpGpuMidThreadLevelPreempt ; // Indicates if preEmption is enabled (HSW+)
283+ uscSkuTable.FtrIoMmuPageFaulting = bigSkuTable.FtrIoMmuPageFaulting ; // Indicates if page faulting is enabled.
284+ uscSkuTable.FtrLocalMemory = bigSkuTable.FtrLocalMemory ;
282285}
283286
284287
@@ -314,7 +317,7 @@ enum SHADER_TYPE
314317};
315318
316319enum SIMD_MODE
317- {
320+ {
318321 SIMD_MODE_8 = 0 ,
319322 SIMD_MODE_16,
320323 SIMD_MODE_32,
@@ -331,8 +334,8 @@ enum PS_DISPATCH_TYPES
331334};
332335
333336enum USC_CLIENT_TYPE
334- {
335- USC_CLIENT_D3D9,
337+ {
338+ USC_CLIENT_D3D9,
336339 USC_CLIENT_D3D10,
337340 USC_CLIENT_D3D12,
338341 USC_CLIENT_OGL,
@@ -366,13 +369,13 @@ struct SShaderStageBTLayout
366369 unsigned int TPMIdx;
367370 unsigned int surfaceScratchIdx;
368371 unsigned int maxBTsize;
369-
372+
370373 // Three following fields are offsets from minConstantBufferIdx:
371374 // NULL CB offset should be programmed right after the
372375 // last constant buffer index. Such programming will allow USC
373- // to correctly clamp indexable CB indexes (when relative constant
374- // buffer addressing is used in a shader) and out of
375- // bounds reads will return 0. Incorrect programming of this
376+ // to correctly clamp indexable CB indexes (when relative constant
377+ // buffer addressing is used in a shader) and out of
378+ // bounds reads will return 0. Incorrect programming of this
376379 // field may cause out of bounds accesses not to return 0.
377380 unsigned int constantBufferNullBoundOffset;
378381 unsigned int immediateConstantBufferOffset;
@@ -381,9 +384,9 @@ struct SShaderStageBTLayout
381384 // Following field is an offset from minResourceIdx:
382385 // NULL resource offset should be programmed right after the
383386 // last shader resource index. Such programming will allow USC
384- // to correctly clamp indexable resource indexes (when relative
385- // shader resource addressing is used in a shader )and out of
386- // bounds reads will return 0. Incorrect programming of this
387+ // to correctly clamp indexable resource indexes (when relative
388+ // shader resource addressing is used in a shader )and out of
389+ // bounds reads will return 0. Incorrect programming of this
387390 // field may cause out of bounds accesses not to return 0.
388391 unsigned int resourceNullBoundOffset;
389392
@@ -407,19 +410,19 @@ const SBindingTableLayout g_cZeroBindingTableLayout = {};
407410const SShaderStageBTLayout g_cZeroShaderStageBTLayout = {};
408411
409412/* ****************************************************************************\
410- DEFINE: GTDI_MAX_KI_OFFSETS
413+ DEFINE: GTDI_MAX_KI_OFFSETS
411414\*****************************************************************************/
412415#define GTDI_MAX_KI_OFFSETS 26
413416
414417/* ****************************************************************************\
415- DEFINE: GTDI_MAX_KI_AGGREGATED_OFFSETS
418+ DEFINE: GTDI_MAX_KI_AGGREGATED_OFFSETS
416419\*****************************************************************************/
417420#define GTDI_MAX_KI_AGGREGATED_OFFSETS 20
418421
419422/* ****************************************************************************\
420- ENUM: GTDI_KI_BUILD_TYPE_ENUM
423+ ENUM: GTDI_KI_BUILD_TYPE_ENUM
421424\*****************************************************************************/
422- typedef enum GTDI_KI_BUILD_TYPE_ENUM
425+ typedef enum GTDI_KI_BUILD_TYPE_ENUM
423426{
424427 GTDI_KERNEL_REGULAR = 0 , // use that value to switch off kernel build override
425428 GTDI_KERNEL_TRACE = 1 ,
@@ -434,7 +437,7 @@ typedef enum GTDI_KI_BUILD_TYPE_ENUM
434437} GTDI_KI_BUILD_TYPE;
435438
436439/* ****************************************************************************\
437- ENUM: GTDI_PROFILING_POINT_TYPE_ENUM
440+ ENUM: GTDI_PROFILING_POINT_TYPE_ENUM
438441\*****************************************************************************/
439442typedef enum GTDI_KERNEL_PROFILING_POINT_TYPE_ENUM
440443{
@@ -542,9 +545,9 @@ enum GFX3DSTATE_PROGRAM_FLOW
542545/* ****************************************************************************\
543546ENUM: GFX3DSTATE_FLOATING_POINT_MODE
544547
545- Description:
548+ Description:
546549 Indicates the floating point mode to be used by the hardware when running
547- compiled kernel program.
550+ compiled kernel program.
548551\*****************************************************************************/
549552enum GFX3DSTATE_FLOATING_POINT_MODE
550553{
@@ -691,8 +694,8 @@ enum INPUT_COVERAGE_MASK_MODE
691694ENUM: SYSTEM_THREAD_MODE
692695
693696Description:
694- Enum type bitmask describing the System Thread mode. The System Thread might
695- support shader debugging and/or the Context Save Restore (CSR) subroutine
697+ Enum type bitmask describing the System Thread mode. The System Thread might
698+ support shader debugging and/or the Context Save Restore (CSR) subroutine
696699 called GPGPU preemption.
697700\*****************************************************************************/
698701typedef enum SYSTEM_THREAD_MODE_ENUM
@@ -803,7 +806,7 @@ enum USC_KERNEL_COMPILER_CONTROLS
803806 Reduce64To32ALUBottomUpPassBitEnable,
804807 Reduce64To32ALUSplitPassBitEnable,
805808 MergeSplitJoinDpEnable,
806- FoldUnpacksEnable,
809+ FoldUnpacksEnable,
807810 ConstantFoldingEnable,
808811 LoopInvariantCodeMotionEnable,
809812 InputMarkingEnable,
@@ -844,14 +847,14 @@ enum USC_KERNEL_COMPILER_CONTROLS
844847 ShaderHWInputPackingEnable,
845848 ShaderDeclarationPackingEnable,
846849 TPMPromotionEnable,
847- SSAAllocatorEnable,
848- SSAAllocator1BBOnly,
849- SSAAllocatorSIMD8Only,
850+ SSAAllocatorEnable,
851+ SSAAllocator1BBOnly,
852+ SSAAllocatorSIMD8Only,
850853 GotoJoinOptEnable,
851854 GotoAroundGotoMergeEnable,
852855 StatefulCompilationEnable,
853856 AtomicDstRemovalEnable,
854- MergeSimd8SamplerCBLoadsToSimd16Enable,
857+ MergeSimd8SamplerCBLoadsToSimd16Enable,
855858 SoftwareFp16PayloadEnable,
856859 SplitQuadTo32bitForALUEnable,
857860 SIMD32DivergentLoopHeuristicEnable,
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