@@ -5488,18 +5488,30 @@ void EmitPass::emitSimdShuffle(llvm::Instruction *inst) {
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if (defaultConditions || forcePreventOOB) {
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uint maskOfValidLanes = numLanes(m_currShader->m_State.m_dispatchSize) - 1;
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- // To support conversion to movi we need to make all calculations
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- // (shl, addr_add) of address NoMask. to avoid random data from
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- // previous execution in divergent CF.
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+ // To support conversion to movi we need to make all calculations (shl, addr_add) of address NoMask.
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+ // to avoid random data from previous execution in divergent CF.
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if (forcePreventOOB) {
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m_encoder->SetNoMask();
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}
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- CVariable *tempCopy = m_currShader->GetNewVariable(simdChannel, "SanitizedIndexShuffleTmp");
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- m_encoder->And(tempCopy, simdChannel, m_currShader->ImmToVariable(maskOfValidLanes, ISA_TYPE_UW));
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- m_encoder->Push();
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+ bool bAllowLVNMatchingForAnd = true;
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+ if (isSimd32 && data->GetType() == ISA_TYPE_F) {
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+ if (auto *prevInst = dyn_cast<llvm::Instruction>(inst->getPrevNode()))
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+ if (GetOpCode(prevInst) == EOPCODE::llvm_fadd)
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+ bAllowLVNMatchingForAnd = false;
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+ }
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- simdChannelUW = m_currShader->BitCast(tempCopy, ISA_TYPE_UW);
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+ if (bAllowLVNMatchingForAnd) {
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+ CVariable *tempCopy = m_currShader->GetNewVariable(simdChannel, "SanitizedIndexShuffleTmp");
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+ m_encoder->And(tempCopy, simdChannel, m_currShader->ImmToVariable(maskOfValidLanes, ISA_TYPE_UW));
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+ simdChannelUW = m_currShader->BitCast(tempCopy, ISA_TYPE_UW);
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+ }
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+ else {
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+ m_encoder->SetSrcRegion(0, 2, 1, 0);
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+ m_encoder->SetDstRegion(2);
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+ m_encoder->And(simdChannelUW, simdChannelUW, m_currShader->ImmToVariable(maskOfValidLanes, ISA_TYPE_UW));
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+ }
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+ m_encoder->Push();
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}
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CVariable *pSrcElm = m_currShader->GetNewVariable(simdChannel->GetNumberElement(), ISA_TYPE_UW, EALIGN_GRF,
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channelUniform, simdChannel->GetNumberInstance(), "ShuffleTmp");
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