@@ -1028,6 +1028,20 @@ void vISAVerifier::verifyInstructionMove(const CISA_INST *inst) {
10281028 " predication is not allowed for dst operands of a "
10291029 " flag copy mov instruction" );
10301030 }
1031+
1032+ /* Commented out because we are too lame to follow our own specification. */
1033+ /*
1034+ REPORT_INSTRUCTION(options,operand_class_dst == OPERAND_GENERAL ||
1035+ operand_class_dst == OPERAND_INDIRECT,
1036+ "Destination operand of CISA MOV instruction only "
1037+ "supports general and indirect operands.");
1038+
1039+ REPORT_INSTRUCTION(options,operand_class_src0 == OPERAND_GENERAL ||
1040+ operand_class_src0 == OPERAND_INDIRECT ||
1041+ operand_class_src0 == OPERAND_IMMEDIATE,
1042+ "Source0 operand of CISA MOV instruction only "
1043+ "supports general, indirect, and immediate operands.");
1044+ */
10311045 break ;
10321046 }
10331047
@@ -1124,18 +1138,6 @@ void vISAVerifier::verifyInstructionMove(const CISA_INST *inst) {
11241138 operand_class_src0 == OPERAND_IMMEDIATE,
11251139 " Source0 operand of CISA SETP instruction only "
11261140 " supports general, indirect, and immediate operands." );
1127-
1128- if (inst->getExecSize () == g4::SIMD32)
1129- REPORT_INSTRUCTION (
1130- options, inst->getExecMask () == vISA_EMASK_M1_NM,
1131- " CISA SETP instruction only suppport M1_NM for SIMD32" );
1132- else
1133- REPORT_INSTRUCTION (
1134- options,
1135- inst->getExecMask () == vISA_EMASK_M1_NM ||
1136- inst->getExecMask () == vISA_EMASK_M5_NM,
1137- " CISA SETP instruction only suppport M1_NM or M5_NM if SIMD "
1138- " size is less than 32" );
11391141 break ;
11401142 }
11411143 case ISA_SEL:
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