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pratikasharsys_zuul
pratikashar
authored and
sys_zuul
committed
Minor fixes
Change-Id: I021efa0c061a08365e92ee55cc0a50dc2f5e4ae1
1 parent 78c2ad9 commit ee34170

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2 files changed

+15
-18
lines changed

2 files changed

+15
-18
lines changed

‎visa/SpillCleanup.cpp‎

Lines changed: 14 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -32,7 +32,6 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
3232
uint32_t computeFillMsgDesc(unsigned int payloadSize, unsigned int offset);
3333
uint32_t computeSpillMsgDesc(unsigned int payloadSize, unsigned int offset);
3434

35-
#define REGISTER_ROW(row) (row)
3635
namespace vISA
3736
{
3837
G4_SrcRegRegion* CoalesceSpillFills::generateCoalescedSpill(unsigned int scratchOffset, unsigned int payloadSize,
@@ -43,7 +42,7 @@ G4_SrcRegRegion* CoalesceSpillFills::generateCoalescedSpill(unsigned int scratch
4342
kernel.fg.builder->getBuiltinR0()->getRegVar(), 0, 0,
4443
kernel.fg.builder->getRegionStride1(), Type_UD);
4544
auto spillSrcPayload = kernel.fg.builder->createSrcRegRegion(Mod_src_undef, Direct, spillDcl->getRegVar(),
46-
(short)REGISTER_ROW(row), 0, kernel.fg.builder->getRegionStride1(), Type_UD);
45+
row, 0, kernel.fg.builder->getRegionStride1(), Type_UD);
4746

4847
// Create send instruction with payloadSize starting at scratch offset min
4948
G4_Declare* fp = nullptr;
@@ -76,7 +75,7 @@ G4_DstRegRegion* CoalesceSpillFills::generateCoalescedFill(unsigned int scratchO
7675
const char* dclName = kernel.fg.builder->getNameString(kernel.fg.mem, 32,
7776
"COAL_FILL_%d", kernel.Declares.size());
7877
auto fillDcl = kernel.fg.builder->createDeclareNoLookup(dclName, G4_GRF,
79-
NUM_DWORDS_PER_GRF, (unsigned short)REGISTER_ROW(dclSize), Type_UD, DeclareType::CoalescedFill);
78+
NUM_DWORDS_PER_GRF, dclSize, Type_UD, DeclareType::CoalescedFill);
8079

8180
if (evenAlignDst)
8281
{
@@ -133,10 +132,10 @@ void CoalesceSpillFills::copyToOldFills(G4_DstRegRegion* coalescedFillDst, std::
133132
simdSize = 16;
134133

135134
G4_DstRegRegion* movDst = kernel.fg.builder->createDstRegRegion(Direct,
136-
oldFill.first->getBase(), (short)REGISTER_ROW(rowOff), 0, 1, Type_UD);
135+
oldFill.first->getBase(), rowOff, 0, 1, Type_UD);
137136

138137
G4_SrcRegRegion* src = kernel.fg.builder->createSrcRegRegion(Mod_src_undef, Direct,
139-
coalescedFillDst->getBase(), (short)REGISTER_ROW(offToUse), 0, kernel.fg.builder->getRegionStride1(), Type_UD);
138+
coalescedFillDst->getBase(), offToUse, 0, kernel.fg.builder->getRegionStride1(), Type_UD);
140139

141140
G4_INST* copy = kernel.fg.builder->createMov((unsigned char)simdSize,
142141
movDst, src, InstOpt_WriteEnable, false);
@@ -159,7 +158,7 @@ G4_Declare* CoalesceSpillFills::createCoalescedSpillDcl(unsigned int payloadSize
159158
dclName = kernel.fg.builder->getNameString(kernel.fg.mem, 32,
160159
"COAL_SPILL_%d", kernel.Declares.size());
161160
spillDcl = kernel.fg.builder->createDeclareNoLookup(dclName, G4_GRF,
162-
NUM_DWORDS_PER_GRF, (unsigned short)REGISTER_ROW(payloadSize), Type_UD, DeclareType::CoalescedSpill);
161+
NUM_DWORDS_PER_GRF, payloadSize, Type_UD, DeclareType::CoalescedSpill);
163162

164163
spillDcl->setDoNotSpill();
165164

@@ -372,7 +371,7 @@ bool CoalesceSpillFills::fillHeuristic(std::list<INST_LIST_ITER>& coalesceableFi
372371
// Now mark bits corresponding to rows
373372
unsigned int regOff = (*c)->getDst()->getRegOff();
374373
for (unsigned int r = regOff;
375-
r < (regOff+ REGISTER_ROW(scratchSize)); r++)
374+
r < (regOff+ scratchSize); r++)
376375
{
377376
it->second.set(r);
378377
}
@@ -636,7 +635,7 @@ void CoalesceSpillFills::keepConsecutiveSpills(std::list<INST_LIST_ITER>& instLi
636635
auto prevSrc1Row = (*candidate)->getSrc(1)->asSrcRegRegion()->getRegOff();
637636

638637
unsigned int scratchOffDelta = scratchOffset - candOffset;
639-
if ((prevSrc1Row + REGISTER_ROW(scratchOffDelta)) != curSrc1Row)
638+
if ((prevSrc1Row + scratchOffDelta) != curSrc1Row)
640639
{
641640
// Following is disallowed
642641
// send (8) V10(1,0) ... <-- resLen = 4
@@ -949,7 +948,7 @@ void CoalesceSpillFills::replaceCoalescedOperands(G4_INST* inst)
949948
{
950949
auto dstRgn = dst->asDstRegRegion();
951950
auto newDstRgn = kernel.fg.builder->createDstRegRegion(Direct, it->second.first->getRegVar(),
952-
REGISTER_ROW(it->second.second) + dstRgn->getRegOff(), dstRgn->getSubRegOff(), dstRgn->getHorzStride(), dstRgn->getType());
951+
it->second.second + dstRgn->getRegOff(), dstRgn->getSubRegOff(), dstRgn->getHorzStride(), dstRgn->getType());
953952

954953
newDstRgn->setAccRegSel(dstRgn->getAccRegSel());
955954
inst->setDest(newDstRgn);
@@ -975,7 +974,7 @@ void CoalesceSpillFills::replaceCoalescedOperands(G4_INST* inst)
975974
auto oldRgnDesc = srcRgn->getRegion();
976975

977976
auto newSrcRgn = kernel.fg.builder->createSrcRegRegion(srcRgn->getModifier(), Direct,
978-
it->second.first->getRegVar(), REGISTER_ROW(it->second.second) + srcRgn->getRegOff(),
977+
it->second.first->getRegVar(), it->second.second + srcRgn->getRegOff(),
979978
srcRgn->getSubRegOff(), oldRgnDesc,
980979
opnd->getType());
981980
newSrcRgn->setAccRegSel(srcRgn->getAccRegSel());
@@ -1350,10 +1349,10 @@ void CoalesceSpillFills::fixSendsSrcOverlap()
13501349
while (elems > 0)
13511350
{
13521351
G4_SrcRegRegion* srcRgn = kernel.fg.builder->createSrcRegRegion(
1353-
Mod_src_undef, Direct, src1->getTopDcl()->getRegVar(), REGISTER_ROW(row), 0,
1352+
Mod_src_undef, Direct, src1->getTopDcl()->getRegVar(), row, 0,
13541353
kernel.fg.builder->getRegionStride1(), Type_UD);
13551354
G4_DstRegRegion* dstRgn = kernel.fg.builder->createDstRegRegion(
1356-
Direct, copyDcl->getRegVar(), REGISTER_ROW(row), 0, 1, Type_UD);
1355+
Direct, copyDcl->getRegVar(), row, 0, 1, Type_UD);
13571356
G4_INST* copyInst = kernel.fg.builder->createMov(8, dstRgn, srcRgn, InstOpt_WriteEnable, false);
13581357
copyInst->setCISAOff(inst->getCISAOff());
13591358
bb->insert(instIt, copyInst);
@@ -1554,7 +1553,7 @@ void CoalesceSpillFills::removeRedundantSplitMovs()
15541553
{
15551554
// Replace src1 of send with srcDcl
15561555
G4_SrcRegRegion* sendSrc1 = kernel.fg.builder->createSrcRegRegion(Mod_src_undef, Direct, srcDcl->getRegVar(),
1557-
(short)REGISTER_ROW(base), 0, kernel.fg.builder->getRegionStride1(), inst->getSrc(1)->getType());
1556+
base, 0, kernel.fg.builder->getRegionStride1(), inst->getSrc(1)->getType());
15581557
inst->setSrc(sendSrc1, 1);
15591558

15601559
for (auto c : copies)
@@ -1764,15 +1763,15 @@ void CoalesceSpillFills::spillFillCleanup()
17641763

17651764
// Insert SIMD8 mov per row
17661765
G4_DstRegRegion* nDst = kernel.fg.builder->createDstRegRegion(Direct,
1767-
inst->getDst()->getBase(), REGISTER_ROW(row) + inst->getDst()->asDstRegRegion()->getRegOff() - REGISTER_ROW(rowStart),
1766+
inst->getDst()->getBase(), row + inst->getDst()->asDstRegRegion()->getRegOff() - rowStart,
17681767
0, 1, Type_UD);
17691768

17701769
auto write = writesPerOffset.find(row)->second;
17711770
G4_SrcRegRegion* src1Write = write->getSrc(1)->asSrcRegRegion();
17721771
unsigned int writeRowStart = write->asSpillIntrinsic()->getOffset();
17731772
unsigned int diff = row - writeRowStart;
17741773
G4_SrcRegRegion* nSrc = kernel.fg.builder->createSrcRegRegion(Mod_src_undef, Direct,
1775-
src1Write->getBase(), REGISTER_ROW(diff) + src1Write->getRegOff(), 0,
1774+
src1Write->getBase(), diff + src1Write->getRegOff(), 0,
17761775
kernel.fg.builder->getRegionStride1(), Type_UD);
17771776

17781777
G4_INST* mov = kernel.fg.builder->createMov((unsigned char)execSize,

‎visa/SpillManagerGMRF.cpp‎

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -101,8 +101,6 @@ static const unsigned SCRATCH_MSG_DESC_CHANNEL_MODE = 16;
101101
static const unsigned SCRATCH_MSG_INVALIDATE_AFTER_READ = 15;
102102
static const unsigned SCRATCH_MSG_DESC_BLOCK_SIZE = 12;
103103

104-
static const uint32_t GRF_ALIGN_MASK = 0xFFFFFFE0;
105-
106104
// Macros
107105

108106
#define LIMIT_SEND_EXEC_SIZE(EXEC_SIZE)(((EXEC_SIZE) > 16)? 16: (EXEC_SIZE))
@@ -3606,7 +3604,7 @@ void SpillManagerGRF::insertAddrTakenSpillAndFillCode( G4_Kernel* kernel, G4_BB*
36063604
spillRegOffset_ += numrows;
36073605
}
36083606

3609-
if( numrows > 1 || (lr->getDcl()->getNumElems() * lr->getDcl()->getElemSize() == 32) )
3607+
if( numrows > 1 || (lr->getDcl()->getNumElems() * lr->getDcl()->getElemSize() == getGRFSize()) )
36103608
{
36113609
if (useScratchMsg_ || useSplitSend())
36123610
{

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