move fp8 regression fix to materialize block ptr

Author: alexbaden

third_party/intel/lib/TritonIntelGPUTransforms/MaterializeBlockPointer.cpp

@@ -71,6 +71,11 @@ struct TritonIntelGPUMaterializeBlockPointerPass
         return;
       }
 
+      if (fastChangeDim == rank - 2 && tensorType.getElementTypeBitWidth() == 8) {
+        // TODO: column major layout w/ fp8 has performance regression
+        return;
+      }
+
       if (fastChangeDim >= (rank - 2)) {
         // HW 2D block read instruction only supports contiguous access.
         Value fastChangeStride = strides[fastChangeDim];

third_party/intel/lib/TritonIntelGPUTransforms/RewriteTensorPointer.cpp

@@ -51,7 +51,7 @@ bool shouldRemove(tt::MakeTensorPtrOp &op, const bool isUsedByStoreOp,
 
   LDBG("hasDotDpasEncoding: " << ttgi::hasDotDpasEncoding(tensorType));
   LDBG("hasDpasEncoding: " << ttgi::hasDpasEncoding(tensorType));
-  if (ttgi::hasDotDpasEncoding(tensorType) || isUsedByBlockLoadOp || (isUsedByStoreOp && ttgi::hasDpasEncoding(tensorType))) {
+  if (/*ttgi::hasDotDpasEncoding(tensorType) ||*/ isUsedByBlockLoadOp || (isUsedByStoreOp && ttgi::hasDpasEncoding(tensorType))) {
     LDBG("Tensor has DPAS layout or is used by load/store op with DPAS layout, "
          "skipping removal");
     return false;