Replace isF...() LLVM API calls with the corresponding isa<...>() (#3268)

Author: AndreyPavlenko

third_party/intel/lib/Analysis/DPAS.cpp

@@ -125,9 +125,9 @@ DPASAnalysis::getDPASType(OpTy op) {
         if (aElemTy.isF32() && op.getInputPrecision() == InputPrecision::TF32)
           return DPASEngineType::FP32_FP32_TF32_TF32;
         // For FP8XFP8->FP32, upcast to FP16
-        if (aElemTy.isFloat8E5M2())
+        if (isa<Float8E5M2Type>(aElemTy))
           return DPASEngineType::FP32_FP32_FP16_FP16;
-        if (aElemTy.isFloat8E4M3FN())
+        if (isa<Float8E4M3FNType>(aElemTy))
           return DPASEngineType::FP32_FP32_FP16_FP16;
       } else if (dElemTy.isF16()) {
         if (aElemTy.isF16())
@@ -147,36 +147,32 @@ DPASAnalysis::getDPASType(OpTy op) {
 
     if (isa<FloatType>(dElemTy)) {
       if (dElemTy.isF32()) {
-        if (aElemTy.isBF16() &&
-            (bElemTy.isFloat8E4M3FN() || bElemTy.isFloat8E5M2()))
+        if (aElemTy.isBF16() && isa<Float8E4M3FNType, Float8E5M2Type>(bElemTy))
           return DPASEngineType::FP32_FP32_BF16_FP8;
         // 2 E2M1 are packed into 1 int8
         if (aElemTy.isBF16() && bElemTy.isInteger(8))
           return DPASEngineType::FP32_FP32_BF16_FP4;
-        if ((aElemTy.isFloat8E4M3FN() || aElemTy.isFloat8E5M2()) &&
-            bElemTy.isBF16())
+        if (isa<Float8E4M3FNType, Float8E5M2Type>(aElemTy) && bElemTy.isBF16())
           return DPASEngineType::FP32_FP32_FP8_BF16;
-        if (aElemTy.isF16() &&
-            (bElemTy.isFloat8E4M3FN() || bElemTy.isFloat8E5M2()))
+        if (aElemTy.isF16() && isa<Float8E4M3FNType, Float8E5M2Type>(bElemTy))
           return DPASEngineType::FP32_FP32_FP16_FP8;
         // 2 E2M1 are packed into 1 int8
         if (aElemTy.isF16() && bElemTy.isInteger(8))
           return DPASEngineType::FP32_FP32_FP16_FP4;
-        if ((aElemTy.isFloat8E4M3FN() || aElemTy.isFloat8E5M2()) &&
-            bElemTy.isF16())
+        if (isa<Float8E4M3FNType, Float8E5M2Type>(aElemTy) && bElemTy.isF16())
           return DPASEngineType::FP32_FP32_FP8_FP16;
-        if ((aElemTy.isFloat8E4M3FN() || aElemTy.isFloat8E5M2()) &&
-            (bElemTy.isFloat8E4M3FN() || bElemTy.isFloat8E5M2()))
+        if (isa<Float8E4M3FNType, Float8E5M2Type>(aElemTy) &&
+            isa<Float8E4M3FNType, Float8E5M2Type>(bElemTy))
           return DPASEngineType::FP32_FP32_FP8_FP8;
-        if ((aElemTy.isFloat8E4M3FN() || aElemTy.isFloat8E5M2()) &&
+        if ((isa<Float8E4M3FNType>(aElemTy) || isa<Float8E5M2Type>(aElemTy)) &&
             bElemTy.isInteger(8))
           return DPASEngineType::FP32_FP32_FP8_FP4;
         if (aElemTy.isInteger(8) && bElemTy.isBF16())
           return DPASEngineType::FP32_FP32_FP4_BF16;
         if (aElemTy.isInteger(8) && bElemTy.isF16())
           return DPASEngineType::FP32_FP32_FP4_FP16;
         if (aElemTy.isInteger(8) &&
-            (bElemTy.isFloat8E4M3FN() || bElemTy.isFloat8E5M2()))
+            isa<Float8E4M3FNType, Float8E5M2Type>(bElemTy))
           return DPASEngineType::FP32_FP32_FP4_FP8;
       }
     }

third_party/intel/lib/Dialect/TritonIntelGPU/IR/Dialect.cpp

@@ -405,7 +405,7 @@ unsigned DpasEncodingAttr::getOpsPerChannel(Type elemType) {
   assert(elemType.isIntOrFloat() && "unsupported type for DpasEncodingAttr");
 
   unsigned dpasElemBitWidths = elemType.getIntOrFloatBitWidth();
-  if (elemType.isFloat8E5M2() || elemType.isFloat8E4M3FN())
+  if (llvm::isa<Float8E5M2Type, Float8E4M3FNType>(elemType))
     dpasElemBitWidths *= 2; // We are upcasting FP8 to FP16.
 
   return DPASCapability::opsChanBitWidths / dpasElemBitWidths;

third_party/intel/lib/TritonIntelGPUToLLVM/ElementwiseOpToLLVM.cpp

@@ -996,7 +996,7 @@ struct FpToFpOpConversion
     auto dstElementType = getElementType(op.getResult());
     auto roundingMode = op.getRounding();
 
-    if (dstElementType.isFloat8E5M2() || dstElementType.isFloat8E4M3FN()) {
+    if (isa<Float8E5M2Type, Float8E4M3FNType>(dstElementType)) {
       assert(roundingMode.has_value() &&
              "Rounding mode must be specified for conversions to fp8");
 

third_party/intel/lib/TritonIntelGPUTransforms/AccelerateMatmul.cpp

@@ -132,8 +132,7 @@ class BlockedToDPAS : public OpRewritePattern<tt::DotOp> {
           oldAType.getElementType().getIntOrFloatBitWidth();
 
       // We are upcasting FP8 to FP16
-      if (oldAType.getElementType().isFloat8E5M2() ||
-          oldAType.getElementType().isFloat8E4M3FN())
+      if (isa<Float8E5M2Type, Float8E4M3FNType>(oldAType.getElementType()))
         dpasElemBitWidths = 2 * dpasElemBitWidths;
 
       // Enlarge the repCluster size to use the large 2D load for A and B
@@ -488,7 +487,7 @@ static void decomposeMixedModeDotOp(ModuleOp mod) {
 
     Type promoteType;
     if (dpasLayout) {
-      bool isNativeFP8 = AElType.isFloat8E5M2() || AElType.isFloat8E4M3FN();
+      bool isNativeFP8 = isa<Float8E5M2Type, Float8E4M3FNType>(AElType);
       // fp8 is not natively supported by the the DPAS instruction, promote it
       // to fp16.
       if (!isNativeFP8)