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[AMD] Add memrealtime to gfx11/gfx12 (#7357)
The semantics of s_sendmsg_rtn_b64 should be identical to s_memrealtime, so we can just reuse the function. This was changed in gfx11. For details, see https://www.amd.com/content/dam/amd/en/documents/radeon-tech-docs/instruction-set-architectures/rdna3-shader-instruction-set-architecture-feb-2023_0.pdf This fixes test_core.py::test_globaltimer on gfx11, gfx12 after triton-lang/triton#7282 --------- Co-authored-by: Paul Trojahn <[email protected]>
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2 files changed

+32
-13
lines changed

2 files changed

+32
-13
lines changed

python/test/unit/language/test_core.py

Lines changed: 5 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -5982,7 +5982,11 @@ def kernel(Out1, Out2, func: tl.constexpr):
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if is_cuda():
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assert h.asm["ptx"].count("%globaltimer") == 2
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else:
5985-
assert h.asm["amdgcn"].count("s_memrealtime") == 2
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target_arch = triton.runtime.driver.active.get_current_target().arch
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if "gfx11" in target_arch or "gfx12" in target_arch:
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assert h.asm["amdgcn"].count("s_sendmsg_rtn_b64") == 2
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else:
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assert h.asm["amdgcn"].count("s_memrealtime") == 2
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def test_smid(device):

third_party/amd/language/hip/utils.py

Lines changed: 27 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -6,15 +6,30 @@ def memrealtime(_semantic=None):
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"""
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Returns a 64-bit real time-counter value
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"""
9-
return core.inline_asm_elementwise(
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"""
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s_memrealtime $0
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s_waitcnt vmcnt(0)
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""",
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"=r",
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[],
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dtype=core.int64,
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is_pure=False,
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pack=1,
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_semantic=_semantic,
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)
9+
target_arch = _semantic.builder.options.arch
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if 'gfx11' in target_arch or 'gfx12' in target_arch:
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return core.inline_asm_elementwise(
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"""
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s_sendmsg_rtn_b64 $0, sendmsg(MSG_RTN_GET_REALTIME)
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s_waitcnt lgkmcnt(0)
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""",
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"=r",
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[],
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dtype=core.int64,
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is_pure=False,
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pack=1,
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_semantic=_semantic,
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)
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else:
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return core.inline_asm_elementwise(
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"""
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s_memrealtime $0
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s_waitcnt vmcnt(0)
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""",
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"=r",
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[],
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dtype=core.int64,
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is_pure=False,
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pack=1,
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_semantic=_semantic,
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)

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