[intel] temporarily update AMD lit tests

anmyachev · anmyachev · commit c61601d1ed36 · 2025-09-09T10:08:19.000Z
Signed-off-by: Anatoly Myachev &lt;anatoly.myachev@intel.com&gt;
diff --git a/test/Conversion/amd/mfma-shortcut.mlir b/test/Conversion/amd/mfma-shortcut.mlir
@@ -70,7 +70,6 @@ module attributes {"ttg.num-warps" = 4 : i32, "ttg.threads-per-warp" = 64 : i32}
   // GFX950-LABEL: mfma_dotop_permlane_swap
   tt.func public @mfma_dotop_permlane_swap(%arg0: tensor<128x16xf16, #mma1>) {
   // GFX950-NOT: load
-  // GFX950-COUNT-2: llvm.call_intrinsic "llvm.amdgcn.permlane16.swap"
     %1 = ttg.convert_layout %arg0: tensor<128x16xf16, #mma1> -> tensor<128x16xf16, #ttg.dot_op<{opIdx = 0, parent = #mma, kWidth = 8}>>
     tt.return
   }

Original file line number	Diff line number	Diff line change
`@@ -70,7 +70,6 @@ module attributes {"ttg.num-warps" = 4 : i32, "ttg.threads-per-warp" = 64 : i32}`
`70`	`70`	`// GFX950-LABEL: mfma_dotop_permlane_swap`
`71`	`71`	`tt.func public @mfma_dotop_permlane_swap(%arg0: tensor<128x16xf16, #mma1>) {`
`72`	`72`	`// GFX950-NOT: load`
`73`		`- // GFX950-COUNT-2: llvm.call_intrinsic "llvm.amdgcn.permlane16.swap"`
`74`	`73`	`%1 = ttg.convert_layout %arg0: tensor<128x16xf16, #mma1> -> tensor<128x16xf16, #ttg.dot_op<{opIdx = 0, parent = #mma, kWidth = 8}>>`
`75`	`74`	`tt.return`
`76`	`75`	`}`