11diff --git a/lib/SPIRV/SPIRVWriter.cpp b/lib/SPIRV/SPIRVWriter.cpp
2- index d363f060a..28f83d661 100644
2+ index ec4ec41f5..4f6d80dd1 100644
33--- a/lib/SPIRV/SPIRVWriter.cpp
44+++ b/lib/SPIRV/SPIRVWriter.cpp
5- @@ -4211 ,20 +4211 ,6 @@ SPIRVValue *LLVMToSPIRVBase::transIntrinsicInst(IntrinsicInst *II,
5+ @@ -4276 ,20 +4276 ,6 @@ SPIRVValue *LLVMToSPIRVBase::transIntrinsicInst(IntrinsicInst *II,
66 // -spirv-allow-unknown-intrinsics work correctly.
77 auto IID = II->getIntrinsicID();
88 switch (IID) {
@@ -23,7 +23,7 @@ index d363f060a..28f83d661 100644
2323 case Intrinsic::assume: {
2424 // llvm.assume translation is currently supported only within
2525 // SPV_KHR_expect_assume extension, ignore it otherwise, since it's
26- @@ -5508 ,11 +5494 ,6 @@ SPIRVValue *LLVMToSPIRVBase::transDirectCallInst(CallInst *CI,
26+ @@ -5721 ,11 +5707 ,6 @@ SPIRVValue *LLVMToSPIRVBase::transDirectCallInst(CallInst *CI,
2727 SmallVector<std::string, 2> Dec;
2828 if (isBuiltinTransToExtInst(CI->getCalledFunction(), &ExtSetKind, &ExtOp,
2929 &Dec)) {
@@ -36,10 +36,10 @@ index d363f060a..28f83d661 100644
3636 auto *FormatStrPtr = cast<PointerType>(CI->getArgOperand(0)->getType());
3737 if (FormatStrPtr->getAddressSpace() !=
3838diff --git a/lib/SPIRV/libSPIRV/SPIRVModule.cpp b/lib/SPIRV/libSPIRV/SPIRVModule.cpp
39- index a680574ec..2ff1df097 100644
39+ index b76987e93..8d06ee792 100644
4040--- a/lib/SPIRV/libSPIRV/SPIRVModule.cpp
4141+++ b/lib/SPIRV/libSPIRV/SPIRVModule.cpp
42- @@ -1732 ,8 +1732 ,6 @@ SPIRVInstruction *SPIRVModuleImpl::addBinaryInst(Op TheOpCode, SPIRVType *Type,
42+ @@ -1739 ,8 +1739 ,6 @@ SPIRVInstruction *SPIRVModuleImpl::addBinaryInst(Op TheOpCode, SPIRVType *Type,
4343 SPIRVValue *Op1,
4444 SPIRVValue *Op2,
4545 SPIRVBasicBlock *BB) {
@@ -48,10 +48,10 @@ index a680574ec..2ff1df097 100644
4848 return addInstruction(SPIRVInstTemplateBase::create(
4949 TheOpCode, Type, getId(),
5050 getVec(Op1->getId(), Op2->getId()), BB, this),
51- @@ -1757 ,8 +1755 ,6 @@ SPIRVInstruction *SPIRVModuleImpl::addUnaryInst(Op TheOpCode,
52- SPIRVType *TheType,
53- SPIRVValue *Op ,
54- SPIRVBasicBlock *BB ) {
51+ @@ -1764 ,8 +1762 ,6 @@ SPIRVInstruction *
52+ SPIRVModuleImpl::addUnaryInst(Op TheOpCode, SPIRVType *TheType, SPIRVValue *Op ,
53+ SPIRVBasicBlock *BB ,
54+ SPIRVInstruction *InsertBefore ) {
5555- if (TheType->isTypeFloat(16, FPEncodingBFloat16KHR) && TheOpCode != OpDot)
5656- addCapability(internal::CapabilityBFloat16ArithmeticINTEL);
5757 return addInstruction(
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