address review comments

anmyachev · anmyachev · commit deff9c77cea9 · 2024-10-22T13:49:42.000Z
Signed-off-by: Anatoly Myachev &lt;anatoly.myachev@intel.com&gt;
diff --git a/lib/Analysis/AxisInfo.cpp b/lib/Analysis/AxisInfo.cpp
@@ -895,7 +895,7 @@ class ShLIOpAxisInfoVisitor final : public BinaryOpVisitorImpl<arith::ShLIOp> {
       lhsDivisibility = 1;
     }
     auto numBits = log2Int(lhsDivisibility);
-    return multiplyDivisor(lhsDivisibility, static_cast<int64_t>(1) << shift);
+    return multiplyDivisor(lhsDivisibility, 1ll << shift);
   }
 
   int64_t getConstancy(arith::ShLIOp op, const AxisInfo &lhs,
diff --git a/lib/Conversion/TritonGPUToLLVM/ScanOpToLLVM.cpp b/lib/Conversion/TritonGPUToLLVM/ScanOpToLLVM.cpp
@@ -128,8 +128,8 @@ static void AddPartialReduce(SmallVector<SmallVector<Value>> &srcValues,
                              ConversionPatternRewriter &rewriter,
                              const TargetInfoBase &targetInfo,
                              ScanLoweringHelper &helper,
-                             const SmallVector<Value> &smemBases,
-                             const SmallVector<Type> &smemTypes, Value warpId,
+                             ArrayRef<Value> smemBases,
+                             ArrayRef<Type> smemTypes, Value warpId,
                              Value laneIdAxis, Value parallelLaneId) {
   Location loc = helper.getLoc();
   unsigned numParallelLane = helper.getNonAxisNumThreadsPerCTA();
diff --git a/third_party/intel/lib/Analysis/AxisInfo.cpp b/third_party/intel/lib/Analysis/AxisInfo.cpp
@@ -900,7 +900,7 @@ class ShLIOpAxisInfoVisitor final : public BinaryOpVisitorImpl<arith::ShLIOp> {
       lhsDivisibility = 1;
     }
     auto numBits = log2Int(lhsDivisibility);
-    return multiplyDivisor(lhsDivisibility, static_cast<int64_t>(1) << shift);
+    return multiplyDivisor(lhsDivisibility, 1ll << shift);
   }
 
   int64_t getConstancy(arith::ShLIOp op, const AxisInfo &lhs,
diff --git a/third_party/intel/lib/TritonIntelGPUToLLVM/ScanOpToLLVM.cpp b/third_party/intel/lib/TritonIntelGPUToLLVM/ScanOpToLLVM.cpp
@@ -126,8 +126,8 @@ static void AddPartialReduce(SmallVector<SmallVector<Value>> &srcValues,
                              ConversionPatternRewriter &rewriter,
                              const TargetInfoBase &targetInfo,
                              ScanLoweringHelper &helper,
-                             const SmallVector<Value> &smemBases,
-                             const SmallVector<Type> &smemTypes, Value warpId,
+                             ArrayRef<Value> smemBases,
+                             ArrayRef<Type> smemTypes, Value warpId,
                              Value laneIdAxis, Value parallelLaneId) {
   Location loc = helper.getLoc();
   unsigned numParallelLane = helper.getNonAxisNumThreadsPerCTA();

Original file line number	Diff line number	Diff line change
`@@ -895,7 +895,7 @@ class ShLIOpAxisInfoVisitor final : public BinaryOpVisitorImpl<arith::ShLIOp> {`
`895`	`895`	`lhsDivisibility = 1;`
`896`	`896`	`}`
`897`	`897`	`auto numBits = log2Int(lhsDivisibility);`
`898`		`- return multiplyDivisor(lhsDivisibility, static_cast<int64_t>(1) << shift);`
	`898`	`+ return multiplyDivisor(lhsDivisibility, 1ll << shift);`
`899`	`899`	`}`
`900`	`900`
`901`	`901`	`int64_t getConstancy(arith::ShLIOp op, const AxisInfo &lhs,`
Original file line number	Diff line number	Diff line change
`@@ -900,7 +900,7 @@ class ShLIOpAxisInfoVisitor final : public BinaryOpVisitorImpl<arith::ShLIOp> {`
`900`	`900`	`lhsDivisibility = 1;`
`901`	`901`	`}`
`902`	`902`	`auto numBits = log2Int(lhsDivisibility);`
`903`		`- return multiplyDivisor(lhsDivisibility, static_cast<int64_t>(1) << shift);`
	`903`	`+ return multiplyDivisor(lhsDivisibility, 1ll << shift);`
`904`	`904`	`}`
`905`	`905`
`906`	`906`	`int64_t getConstancy(arith::ShLIOp op, const AxisInfo &lhs,`