[TritonGEN] Lower to GenISA for 2d_block_read_16b_16r8x4c (#4503)

Fixes #4502

Signed-off-by: Whitney Tsang <[email protected]>

Author: whitneywhtsang

test/TritonGEN/tritongen-2Dblockload-to-llvm.mlir

@@ -148,6 +148,20 @@ llvm.func @triton_gen.2Dblockload(%ptr : !llvm.ptr<1>, %base_width : i32, %base_
 
 // -----
 
+llvm.func @triton_gen.2Dblockload(%ptr : !llvm.ptr<1>, %base_width : i32, %base_height : i32, %base_pitch : i32, %x : i32, %y : i32) {
+  // CHECK:    %[[ELEM_BITS:.*]] = llvm.mlir.constant(16 : i32) : i32
+  // CHECK:    %[[TILE_WIDTH:.*]] = llvm.mlir.constant(8 : i32) : i32
+  // CHECK:    %[[TILE_HEIGHT:.*]] = llvm.mlir.constant(16 : i32) : i32
+  // CHECK:    %[[VBLOCKS:.*]] = llvm.mlir.constant(4 : i32) : i32
+  // CHECK:    %[[TRANSPOSE:.*]] = llvm.mlir.constant(false) : i1
+  // CHECK:    %[[VNNI:.*]] = llvm.mlir.constant(false) : i1
+  // CHECK:    %[[VAL_68:.*]] = llvm.call spir_funccc @llvm.genx.GenISA.LSC2DBlockRead.v32i16({{.*}}, {{.*}}, {{.*}}, {{.*}}, {{.*}}, {{.*}}, %[[ELEM_BITS]], %[[TILE_WIDTH]], %[[TILE_HEIGHT]], %[[VBLOCKS]], %[[TRANSPOSE]], %[[VNNI]], {{.*}})
+  %0 = triton_gen.2Dblockload %ptr, %base_width, %base_height, %base_pitch, %x, %y {elem_size_in_bits=16, tile_width=8, tile_height=16, v_blocks=4, transpose=false, vnni_transform=false, cache_control=Default} : (!llvm.ptr<1>, i32, i32, i32, i32, i32) -> vector<32xi16>
+  llvm.return
+}
+
+// -----
+
 llvm.func @triton_gen.2Dblockload(%ptr : !llvm.ptr<1>, %base_width : i32, %base_height : i32, %base_pitch : i32, %x : i32, %y : i32) {
   // CHECK:      llvm.mlir.constant(2 : i32) : i32
   // CHECK:      [[ElemSize:%.*]] = llvm.mlir.constant(2 : i32) : i32

third_party/intel/lib/TritonGENToLLVM/TritonGENToLLVMPass.cpp

@@ -119,6 +119,7 @@ static bool isSPVBuiltinAvailable(TritonGEN::Matrix2DBlockLoadOp op) {
   // intel_sub_group_2d_block_read_8b_16r16x2c
   // intel_sub_group_2d_block_read_8b_8r16x1c
   // intel_sub_group_2d_block_read_8b_8r16x2c
+  // intel_sub_group_2d_block_read_16b_16r8x4c
   if ((op.getElemSizeInBits() == 8 && op.getTileHeight() == 32 &&
        op.getTileWidth() == 16 && op.getVBlocks() == 1 &&
        !op.getVnniTransform()) ||
@@ -133,6 +134,9 @@ static bool isSPVBuiltinAvailable(TritonGEN::Matrix2DBlockLoadOp op) {
        !op.getVnniTransform()) ||
       (op.getElemSizeInBits() == 8 && op.getTileHeight() == 8 &&
        op.getTileWidth() == 16 && op.getVBlocks() == 2 &&
+       !op.getVnniTransform()) ||
+      (op.getElemSizeInBits() == 16 && op.getTileHeight() == 16 &&
+       op.getTileWidth() == 8 && op.getVBlocks() == 4 &&
        !op.getVnniTransform())) {
     return false;
   }