Remove the `RewriteTensorPointer` pass

[etiotto]

After #2581 we are getting closer to break the dependency on the RewriteTensorPointer pass (which transforms certain blocked pointers load/stores into load/stores that use tensor of pointers). This issue is about investigating the remaining performance gaps and addressing them.

[etiotto]

I removed the RewriteTensorPointer pass and did a performance run on the Triton benchmarks here http://benchmarks.glados.intel.com/d/1pXX4hUSz/microbenchmarks?orgId=1&var-tag=ci%7Cetiotto2%7Cetiotto3&var-bench=attn&var-bench=gemm&var-bench=gemm-preop-exp&var-bench=gemm-postop-gelu&var-bench=gemm-postop-addmatrix&var-bench=gemm-streamk&var-bench=gemm-splitk&var-bench=gemm-bt&var-bench=gemm-at&var-device=All&var-compiler=triton&var-backend=All&var-baseline_backend=triton-ci-XPU%201550&var-target_backend=triton-ci-XPU%201550&from=now-5d&to=now

Removing the pass causes performance degradations in the gemm-at benchmark (See the light blue dot):

I investigated the reason for the degradation. The problem is that the lowering code for block pointers in LoadStoreOpToLLVM.cpp does not vectorizes the load for the operand A of the tt.dot operation. I manually hacked that code to assume a vector length of 4 and recovered the performance degradation.

In order to fix this problem properly we will need to use the specialized Axis Analysis (intel version) which support load/stores for blocked pointers. To do that, we need to make the intel specialized version of Axis Analysis derive from the upstream AxisAnalysis class and restructure the code a bit.

[etiotto]

With PR #2584 Triton's benchmarks show no performance degradations (label "etiotto3"):

http://benchmarks.glados.intel.com/d/1pXX4hUSz/microbenchmarks?orgId=1&var-tag=ci%7Cetiotto3&var-bench=attn&var-bench=gemm&var-bench=gemm-preop-exp&var-bench=gemm-postop-gelu&var-bench=gemm-postop-addmatrix&var-bench=gemm-streamk&var-bench=gemm-splitk&var-bench=gemm-bt&var-bench=gemm-at&var-device=All&var-compiler=triton&var-backend=All&var-baseline_backend=triton-ci-XPU%201550&var-target_backend=triton-ci-XPU%201550&from=now-10d&to=now