[XPU][TritonGEN] Revamp SIMD block memory access operations #2756
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Revamp `tritongen.simdblock[read|write]` operations: - Rename to `tritongen.sub_group_block_[read|write]` - Implement type verification in signature - Represent scalar block memory accesses with a scalar type instead of `vector<1xty>` - Revamp assembly format Signed-off-by: victor-eds <[email protected]>
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victor-eds
commented
Nov 19, 2024
sommerlukas
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Nov 19, 2024
victor-eds
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Nov 19, 2024
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| def TritonGEN_SubGroupBlockMemoryAccessElementType | ||
| : AnyTypeOf<[I8, I16, I32, I64], | ||
| "Valid sub-group block memory access element type">; | ||
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| def TritonGEN_SubGroupBlockMemoryAccessType | ||
| : AnyTypeOf<[TritonGEN_SubGroupBlockMemoryAccessElementType, | ||
| FixedVectorOfLengthAndType< | ||
| [2, 4, 8], | ||
| [TritonGEN_SubGroupBlockMemoryAccessElementType]>, | ||
| // Vectors of length 16 only allowed for i8 for now. | ||
| FixedVectorOfLengthAndType<[16], [I8]>], | ||
| "Valid sub-group block memory access type">; | ||
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| def TritonGEN_SubGroupBlockMemoryAccessPointerType | ||
| : Type<And<[LLVM_AnyPointer.predicate, | ||
| Or<[CPred<"::llvm::cast<::mlir::LLVM::LLVMPointerType>($_self)" # | ||
| ".getAddressSpace() == " # | ||
| "static_cast<unsigned>(kCrossWorkgroup)">, | ||
| CPred<"::llvm::cast<::mlir::LLVM::LLVMPointerType>($_self)" # | ||
| ".getAddressSpace() == " # | ||
| "static_cast<unsigned>(kWorkgroup)">]>]>, | ||
| "LLVM pointer in local or global OpenCL address space", | ||
| "::mlir::LLVM::LLVMPointerType">; | ||
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| def TritonGEN_SubGroupBlockReadOp: TritonGEN_Op<"sub_group_block_read"> { | ||
| let summary = "Sub-group block read."; |
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whitneywhtsang
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Nov 19, 2024
chengjunlu
approved these changes
Nov 20, 2024
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Revamp
tritongen.simdblock[read|write]operations:tritongen.sub_group_block_[read|write]vector<1xty>Closes #2750