diff --git a/erasure_code/aarch64/ec_aarch64_dispatcher.c b/erasure_code/aarch64/ec_aarch64_dispatcher.c
index fdb587ce..5cd20b68 100644
--- a/erasure_code/aarch64/ec_aarch64_dispatcher.c
+++ b/erasure_code/aarch64/ec_aarch64_dispatcher.c
@@ -65,7 +65,7 @@ DEFINE_INTERFACE_DISPATCHER(gf_vect_dot_prod)
         if (auxval & HWCAP_ASIMD)
                 return gf_vect_dot_prod_neon;
 #elif defined(__APPLE__)
-        if (sysctlEnabled(SYSCTL_SVE_KEY))
+        if (sysctlEnabled(SYSCTL_SME_KEY))
                 return gf_vect_dot_prod_sve;
         return gf_vect_dot_prod_neon;
 #endif
@@ -82,7 +82,7 @@ DEFINE_INTERFACE_DISPATCHER(gf_vect_mad)
         if (auxval & HWCAP_ASIMD)
                 return gf_vect_mad_neon;
 #elif defined(__APPLE__)
-        if (sysctlEnabled(SYSCTL_SVE_KEY))
+        if (sysctlEnabled(SYSCTL_SME_KEY))
                 return gf_vect_mad_sve;
         return gf_vect_mad_neon;
 #endif
@@ -99,7 +99,7 @@ DEFINE_INTERFACE_DISPATCHER(ec_encode_data)
         if (auxval & HWCAP_ASIMD)
                 return ec_encode_data_neon;
 #elif defined(__APPLE__)
-        if (sysctlEnabled(SYSCTL_SVE_KEY))
+        if (sysctlEnabled(SYSCTL_SME_KEY))
                 return ec_encode_data_sve;
         return ec_encode_data_neon;
 #endif
@@ -116,7 +116,7 @@ DEFINE_INTERFACE_DISPATCHER(ec_encode_data_update)
         if (auxval & HWCAP_ASIMD)
                 return ec_encode_data_update_neon;
 #elif defined(__APPLE__)
-        if (sysctlEnabled(SYSCTL_SVE_KEY))
+        if (sysctlEnabled(SYSCTL_SME_KEY))
                 return ec_encode_data_update_sve;
         return ec_encode_data_update_neon;
 #endif
@@ -133,7 +133,7 @@ DEFINE_INTERFACE_DISPATCHER(gf_vect_mul)
         if (auxval & HWCAP_ASIMD)
                 return gf_vect_mul_neon;
 #elif defined(__APPLE__)
-        if (sysctlEnabled(SYSCTL_SVE_KEY))
+        if (sysctlEnabled(SYSCTL_SME_KEY))
                 return gf_vect_mul_sve;
         return gf_vect_mul_neon;
 #endif
diff --git a/erasure_code/aarch64/gf_2vect_dot_prod_sve.S b/erasure_code/aarch64/gf_2vect_dot_prod_sve.S
index 99b5f15c..f7fc6216 100644
--- a/erasure_code/aarch64/gf_2vect_dot_prod_sve.S
+++ b/erasure_code/aarch64/gf_2vect_dot_prod_sve.S
@@ -28,7 +28,11 @@
 **********************************************************************/
 .text
 .align		6
+#ifdef __APPLE__
+.arch		armv8-a+sme
+#else
 .arch		armv8-a+sve
+#endif
 
 #include "../include/aarch64_label.h"
 
@@ -86,6 +90,9 @@ q_gft2_hi	.req	q18
 z_dest2		.req	z27
 
 cdecl(gf_2vect_dot_prod_sve):
+#ifdef __APPLE__
+	smstart	sm
+#endif
 	/* less than 16 bytes, return_fail */
 	cmp	x_len, #16
 	blt	.return_fail
@@ -98,7 +105,7 @@ cdecl(gf_2vect_dot_prod_sve):
 /* Loop 1: x_len, vector length */
 .Lloopsve_vl:
 	whilelo	p0.b, x_pos, x_len
-	b.none	.return_pass
+	b.eq	.return_pass
 
 	mov	x_vec_i, #0			/* clear x_vec_i */
 	ldr	x_ptr, [x_src, x_vec_i]		/* x_ptr: src base addr. */
@@ -161,8 +168,14 @@ cdecl(gf_2vect_dot_prod_sve):
 
 .return_pass:
 	mov	w_ret, #0
+#ifdef __APPLE__
+	smstop	sm
+#endif
 	ret
 
 .return_fail:
 	mov	w_ret, #1
+#ifdef __APPLE__
+	smstop	sm
+#endif
 	ret
diff --git a/erasure_code/aarch64/gf_2vect_mad_sve.S b/erasure_code/aarch64/gf_2vect_mad_sve.S
index f0ddf011..29fda053 100644
--- a/erasure_code/aarch64/gf_2vect_mad_sve.S
+++ b/erasure_code/aarch64/gf_2vect_mad_sve.S
@@ -28,7 +28,11 @@
 **********************************************************************/
 .text
 .align		6
+#ifdef __APPLE__
+.arch		armv8-a+sme
+#else
 .arch		armv8-a+sve
+#endif
 
 #include "../include/aarch64_label.h"
 
@@ -82,6 +86,9 @@ q_gft2_hi	.req	q18
 z_dest2		.req	z27
 
 cdecl(gf_2vect_mad_sve):
+#ifdef __APPLE__
+	smstart	sm
+#endif
 	/* less than 16 bytes, return_fail */
 	cmp	x_len, #16
 	blt	.return_fail
@@ -104,7 +111,7 @@ cdecl(gf_2vect_mad_sve):
 	/* vector length agnostic */
 .Lloopsve_vl:
 	whilelo	p0.b, x_pos, x_len
-	b.none	.return_pass
+	b.eq	.return_pass
 
 	/* prefetch dest data */
 	prfb	pldl2strm, p0, [x_dest1, x_pos]
@@ -145,8 +152,14 @@ cdecl(gf_2vect_mad_sve):
 
 .return_pass:
 	mov	w_ret, #0
+#ifdef __APPLE__
+	smstop	sm
+#endif
 	ret
 
 .return_fail:
 	mov	w_ret, #1
+#ifdef __APPLE__
+	smstop	sm
+#endif
 	ret
diff --git a/erasure_code/aarch64/gf_3vect_dot_prod_sve.S b/erasure_code/aarch64/gf_3vect_dot_prod_sve.S
index 8f6414ee..8562257d 100644
--- a/erasure_code/aarch64/gf_3vect_dot_prod_sve.S
+++ b/erasure_code/aarch64/gf_3vect_dot_prod_sve.S
@@ -28,7 +28,11 @@
 **********************************************************************/
 .text
 .align		6
+#ifdef __APPLE__
+.arch		armv8-a+sme
+#else
 .arch		armv8-a+sve
+#endif
 
 #include "../include/aarch64_label.h"
 
@@ -94,6 +98,9 @@ z_dest2		.req	z27
 z_dest3		.req	z28
 
 cdecl(gf_3vect_dot_prod_sve):
+#ifdef __APPLE__
+	smstart	sm
+#endif
 	/* less than 16 bytes, return_fail */
 	cmp	x_len, #16
 	blt	.return_fail
@@ -107,7 +114,7 @@ cdecl(gf_3vect_dot_prod_sve):
 /* Loop 1: x_len, vector length */
 .Lloopsve_vl:
 	whilelo	p0.b, x_pos, x_len
-	b.none	.return_pass
+	b.eq	.return_pass
 
 	mov	x_vec_i, #0			/* clear x_vec_i */
 	ldr	x_ptr, [x_src, x_vec_i]		/* x_ptr: src base addr. */
@@ -182,8 +189,14 @@ cdecl(gf_3vect_dot_prod_sve):
 
 .return_pass:
 	mov	w_ret, #0
+#ifdef __APPLE__
+	smstop	sm
+#endif
 	ret
 
 .return_fail:
 	mov	w_ret, #1
+#ifdef __APPLE__
+	smstop	sm
+#endif
 	ret
diff --git a/erasure_code/aarch64/gf_3vect_mad_sve.S b/erasure_code/aarch64/gf_3vect_mad_sve.S
index 9e0ca5c4..4a575442 100644
--- a/erasure_code/aarch64/gf_3vect_mad_sve.S
+++ b/erasure_code/aarch64/gf_3vect_mad_sve.S
@@ -28,7 +28,11 @@
 **********************************************************************/
 .text
 .align		6
+#ifdef __APPLE__
+.arch		armv8-a+sme
+#else
 .arch		armv8-a+sve
+#endif
 
 #include "../include/aarch64_label.h"
 
@@ -89,6 +93,9 @@ z_dest2		.req	z27
 z_dest3		.req	z28
 
 cdecl(gf_3vect_mad_sve):
+#ifdef __APPLE__
+	smstart	sm
+#endif
 	/* less than 16 bytes, return_fail */
 	cmp	x_len, #16
 	blt	.return_fail
@@ -115,7 +122,7 @@ cdecl(gf_3vect_mad_sve):
 	/* vector length agnostic */
 .Lloopsve_vl:
 	whilelo	p0.b, x_pos, x_len
-	b.none	.return_pass
+	b.eq	.return_pass
 
 	/* dest data prefetch */
 	prfb	pldl2strm, p0, [x_dest1, x_pos]
@@ -168,8 +175,14 @@ cdecl(gf_3vect_mad_sve):
 
 .return_pass:
 	mov	w_ret, #0
+#ifdef __APPLE__
+	smstop	sm
+#endif
 	ret
 
 .return_fail:
 	mov	w_ret, #1
+#ifdef __APPLE__
+	smstop	sm
+#endif
 	ret
diff --git a/erasure_code/aarch64/gf_4vect_dot_prod_sve.S b/erasure_code/aarch64/gf_4vect_dot_prod_sve.S
index eb354279..7e9bd0a7 100644
--- a/erasure_code/aarch64/gf_4vect_dot_prod_sve.S
+++ b/erasure_code/aarch64/gf_4vect_dot_prod_sve.S
@@ -28,7 +28,11 @@
 **********************************************************************/
 .text
 .align		6
+#ifdef __APPLE__
+.arch		armv8-a+sme
+#else
 .arch		armv8-a+sve
+#endif
 
 #include "../include/aarch64_label.h"
 
@@ -102,6 +106,9 @@ z_dest3		.req	z28
 z_dest4		.req	z29
 
 cdecl(gf_4vect_dot_prod_sve):
+#ifdef __APPLE__
+	smstart	sm
+#endif
 	/* less than 16 bytes, return_fail */
 	cmp	x_len, #16
 	blt	.return_fail
@@ -115,7 +122,7 @@ cdecl(gf_4vect_dot_prod_sve):
 /* Loop 1: x_len, vector length */
 .Lloopsve_vl:
 	whilelo	p0.b, x_pos, x_len
-	b.none	.return_pass
+	b.eq	.return_pass
 
 	mov	x_vec_i, #0			/* clear x_vec_i */
 	ldr	x_ptr, [x_src, x_vec_i]		/* x_ptr: src base addr. */
@@ -201,8 +208,14 @@ cdecl(gf_4vect_dot_prod_sve):
 
 .return_pass:
 	mov	w_ret, #0
+#ifdef __APPLE__
+	smstop	sm
+#endif
 	ret
 
 .return_fail:
 	mov	w_ret, #1
+#ifdef __APPLE__
+	smstop	sm
+#endif
 	ret
diff --git a/erasure_code/aarch64/gf_4vect_mad_sve.S b/erasure_code/aarch64/gf_4vect_mad_sve.S
index 89ec89f5..c96b2efd 100644
--- a/erasure_code/aarch64/gf_4vect_mad_sve.S
+++ b/erasure_code/aarch64/gf_4vect_mad_sve.S
@@ -28,7 +28,11 @@
 **********************************************************************/
 .text
 .align		6
+#ifdef __APPLE__
+.arch		armv8-a+sme
+#else
 .arch		armv8-a+sve
+#endif
 
 #include "../include/aarch64_label.h"
 
@@ -96,6 +100,9 @@ z_dest3		.req	z28
 z_dest4		.req	z29
 
 cdecl(gf_4vect_mad_sve):
+#ifdef __APPLE__
+	smstart	sm
+#endif
 	/* less than 16 bytes, return_fail */
 	cmp	x_len, #16
 	blt	.return_fail
@@ -126,7 +133,7 @@ cdecl(gf_4vect_mad_sve):
 	/* vector length agnostic */
 .Lloopsve_vl:
 	whilelo	p0.b, x_pos, x_len
-	b.none	.return_pass
+	b.eq	.return_pass
 
 	prfb	pldl2strm, p0, [x_dest1, x_pos]
 	prfb	pldl2strm, p0, [x_dest2, x_pos]
@@ -187,8 +194,14 @@ cdecl(gf_4vect_mad_sve):
 
 .return_pass:
 	mov	w_ret, #0
+#ifdef __APPLE__
+	smstop	sm
+#endif
 	ret
 
 .return_fail:
 	mov	w_ret, #1
+#ifdef __APPLE__
+	smstop	sm
+#endif
 	ret
diff --git a/erasure_code/aarch64/gf_5vect_dot_prod_sve.S b/erasure_code/aarch64/gf_5vect_dot_prod_sve.S
index bb7cd018..b9261d28 100644
--- a/erasure_code/aarch64/gf_5vect_dot_prod_sve.S
+++ b/erasure_code/aarch64/gf_5vect_dot_prod_sve.S
@@ -28,7 +28,11 @@
 **********************************************************************/
 .text
 .align		6
+#ifdef __APPLE__
+.arch		armv8-a+sme
+#else
 .arch		armv8-a+sve
+#endif
 
 #include "../include/aarch64_label.h"
 
@@ -110,6 +114,9 @@ z_dest4		.req	z29
 z_dest5		.req	z30
 
 cdecl(gf_5vect_dot_prod_sve):
+#ifdef __APPLE__
+	smstart	sm
+#endif
 	/* less than 16 bytes, return_fail */
 	cmp	x_len, #16
 	blt	.return_fail
@@ -128,7 +135,7 @@ cdecl(gf_5vect_dot_prod_sve):
 /* Loop 1: x_len, vector length */
 .Lloopsve_vl:
 	whilelo	p0.b, x_pos, x_len
-	b.none	.return_pass
+	b.eq	.return_pass
 
 	mov	x_vec_i, #0			/* clear x_vec_i */
 	ldr	x_ptr, [x_src, x_vec_i]		/* x_ptr: src base addr. */
@@ -230,8 +237,14 @@ cdecl(gf_5vect_dot_prod_sve):
 	add	sp, sp, #16
 
 	mov	w_ret, #0
+#ifdef __APPLE__
+	smstop	sm
+#endif
 	ret
 
 .return_fail:
 	mov	w_ret, #1
+#ifdef __APPLE__
+	smstop	sm
+#endif
 	ret
diff --git a/erasure_code/aarch64/gf_5vect_mad_sve.S b/erasure_code/aarch64/gf_5vect_mad_sve.S
index ab374d36..ef972a27 100644
--- a/erasure_code/aarch64/gf_5vect_mad_sve.S
+++ b/erasure_code/aarch64/gf_5vect_mad_sve.S
@@ -28,7 +28,11 @@
 **********************************************************************/
 .text
 .align		6
+#ifdef __APPLE__
+.arch		armv8-a+sme
+#else
 .arch		armv8-a+sve
+#endif
 
 #include "../include/aarch64_label.h"
 
@@ -103,6 +107,9 @@ z_dest4		.req	z29
 z_dest5		.req	z30
 
 cdecl(gf_5vect_mad_sve):
+#ifdef __APPLE__
+	smstart	sm
+#endif
 	/* less than 16 bytes, return_fail */
 	cmp	x_len, #16
 	blt	.return_fail
@@ -137,7 +144,7 @@ cdecl(gf_5vect_mad_sve):
 	/* vector length agnostic */
 .Lloopsve_vl:
 	whilelo	p0.b, x_pos, x_len
-	b.none	.return_pass
+	b.eq	.return_pass
 
 	prfb	pldl2strm, p0, [x_dest1, x_pos]
 	prfb	pldl2strm, p0, [x_dest2, x_pos]
@@ -211,8 +218,14 @@ cdecl(gf_5vect_mad_sve):
 
 .return_pass:
 	mov	w_ret, #0
+#ifdef __APPLE__
+	smstop	sm
+#endif
 	ret
 
 .return_fail:
 	mov	w_ret, #1
+#ifdef __APPLE__
+	smstop	sm
+#endif
 	ret
diff --git a/erasure_code/aarch64/gf_6vect_dot_prod_sve.S b/erasure_code/aarch64/gf_6vect_dot_prod_sve.S
index acc98953..518f23a1 100644
--- a/erasure_code/aarch64/gf_6vect_dot_prod_sve.S
+++ b/erasure_code/aarch64/gf_6vect_dot_prod_sve.S
@@ -28,7 +28,11 @@
 **********************************************************************/
 .text
 .align		6
+#ifdef __APPLE__
+.arch		armv8-a+sme
+#else
 .arch		armv8-a+sve
+#endif
 
 #include "../include/aarch64_label.h"
 
@@ -118,6 +122,9 @@ z_dest5		.req	z30
 z_dest6		.req	z31
 
 cdecl(gf_6vect_dot_prod_sve):
+#ifdef __APPLE__
+	smstart	sm
+#endif
 	/* less than 16 bytes, return_fail */
 	cmp	x_len, #16
 	blt	.return_fail
@@ -137,7 +144,7 @@ cdecl(gf_6vect_dot_prod_sve):
 /* Loop 1: x_len, vector length */
 .Lloopsve_vl:
 	whilelo	p0.b, x_pos, x_len
-	b.none	.return_pass
+	b.eq	.return_pass
 
 	mov	x_vec_i, #0			/* clear x_vec_i */
 	ldr	x_ptr, [x_src, x_vec_i]		/* x_ptr: src base addr. */
@@ -251,8 +258,14 @@ cdecl(gf_6vect_dot_prod_sve):
 	add	sp, sp, #32
 
 	mov	w_ret, #0
+#ifdef __APPLE__
+	smstop	sm
+#endif
 	ret
 
 .return_fail:
 	mov	w_ret, #1
+#ifdef __APPLE__
+	smstop	sm
+#endif
 	ret
diff --git a/erasure_code/aarch64/gf_6vect_mad_sve.S b/erasure_code/aarch64/gf_6vect_mad_sve.S
index c4f372cd..c0ba4173 100644
--- a/erasure_code/aarch64/gf_6vect_mad_sve.S
+++ b/erasure_code/aarch64/gf_6vect_mad_sve.S
@@ -28,7 +28,11 @@
 **********************************************************************/
 .text
 .align		6
+#ifdef __APPLE__
+.arch		armv8-a+sme
+#else
 .arch		armv8-a+sve
+#endif
 
 #include "../include/aarch64_label.h"
 
@@ -110,6 +114,9 @@ z_dest5		.req	z30
 z_dest6		.req	z31
 
 cdecl(gf_6vect_mad_sve):
+#ifdef __APPLE__
+	smstart	sm
+#endif
 	/* less than 16 bytes, return_fail */
 	cmp	x_len, #16
 	blt	.return_fail
@@ -148,7 +155,7 @@ cdecl(gf_6vect_mad_sve):
 	/* vector length agnostic */
 .Lloopsve_vl:
 	whilelo	p0.b, x_pos, x_len
-	b.none	.return_pass
+	b.eq	.return_pass
 
 	prfb	pldl2strm, p0, [x_dest1, x_pos]
 	prfb	pldl2strm, p0, [x_dest2, x_pos]
@@ -230,8 +237,14 @@ cdecl(gf_6vect_mad_sve):
 
 .return_pass:
 	mov	w_ret, #0
+#ifdef __APPLE__
+	smstop	sm
+#endif
 	ret
 
 .return_fail:
 	mov	w_ret, #1
+#ifdef __APPLE__
+	smstop	sm
+#endif
 	ret
diff --git a/erasure_code/aarch64/gf_7vect_dot_prod_sve.S b/erasure_code/aarch64/gf_7vect_dot_prod_sve.S
index 0f74873d..d2c037ea 100644
--- a/erasure_code/aarch64/gf_7vect_dot_prod_sve.S
+++ b/erasure_code/aarch64/gf_7vect_dot_prod_sve.S
@@ -28,7 +28,11 @@
 **********************************************************************/
 .text
 .align		6
+#ifdef __APPLE__
+.arch		armv8-a+sme
+#else
 .arch		armv8-a+sve
+#endif
 
 #include "../include/aarch64_label.h"
 
@@ -127,6 +131,9 @@ z_dest5		.req	z30
 z_dest6		.req	z31
 
 cdecl(gf_7vect_dot_prod_sve):
+#ifdef __APPLE__
+	smstart	sm
+#endif
 	/* less than 16 bytes, return_fail */
 	cmp	x_len, #16
 	blt	.return_fail
@@ -148,7 +155,7 @@ cdecl(gf_7vect_dot_prod_sve):
 /* Loop 1: x_len, vector length */
 .Lloopsve_vl:
 	whilelo	p0.b, x_pos, x_len
-	b.none	.return_pass
+	b.eq	.return_pass
 
 	mov	x_vec_i, #0			/* clear x_vec_i */
 	ldr	x_ptr, [x_src, x_vec_i]		/* x_ptr: src base addr. */
@@ -274,8 +281,14 @@ cdecl(gf_7vect_dot_prod_sve):
 	add	sp, sp, #48
 
 	mov	w_ret, #0
+#ifdef __APPLE__
+	smstop	sm
+#endif
 	ret
 
 .return_fail:
 	mov	w_ret, #1
+#ifdef __APPLE__
+	smstop	sm
+#endif
 	ret
diff --git a/erasure_code/aarch64/gf_8vect_dot_prod_sve.S b/erasure_code/aarch64/gf_8vect_dot_prod_sve.S
index 20768f48..d7f82291 100644
--- a/erasure_code/aarch64/gf_8vect_dot_prod_sve.S
+++ b/erasure_code/aarch64/gf_8vect_dot_prod_sve.S
@@ -28,7 +28,11 @@
 **********************************************************************/
 .text
 .align		6
+#ifdef __APPLE__
+.arch		armv8-a+sme
+#else
 .arch		armv8-a+sve
+#endif
 
 #include "../include/aarch64_label.h"
 
@@ -136,6 +140,9 @@ z_dest5		.req	z30
 z_dest6		.req	z31
 
 cdecl(gf_8vect_dot_prod_sve):
+#ifdef __APPLE__
+	smstart	sm
+#endif
 	/* less than 16 bytes, return_fail */
 	cmp	x_len, #16
 	blt	.return_fail
@@ -160,7 +167,7 @@ cdecl(gf_8vect_dot_prod_sve):
 /* Loop 1: x_len, vector length */
 .Lloopsve_vl:
 	whilelo	p0.b, x_pos, x_len
-	b.none	.return_pass
+	b.eq	.return_pass
 
 	mov	x_vec_i, #0			/* clear x_vec_i */
 	ldr	x_ptr, [x_src, x_vec_i]		/* x_ptr: src base addr. */
@@ -300,8 +307,14 @@ cdecl(gf_8vect_dot_prod_sve):
 	add	sp, sp, #80
 
 	mov	w_ret, #0
+#ifdef __APPLE__
+	smstop	sm
+#endif
 	ret
 
 .return_fail:
 	mov	w_ret, #1
+#ifdef __APPLE__
+	smstop	sm
+#endif
 	ret
diff --git a/erasure_code/aarch64/gf_vect_dot_prod_sve.S b/erasure_code/aarch64/gf_vect_dot_prod_sve.S
index 48ce151f..356ef3de 100644
--- a/erasure_code/aarch64/gf_vect_dot_prod_sve.S
+++ b/erasure_code/aarch64/gf_vect_dot_prod_sve.S
@@ -28,7 +28,11 @@
 **********************************************************************/
 .text
 .align		6
+#ifdef __APPLE__
+.arch		armv8-a+sme
+#else
 .arch		armv8-a+sve
+#endif
 
 #include "../include/aarch64_label.h"
 
@@ -71,6 +75,9 @@ q_gft1_lo	.req	q4
 q_gft1_hi	.req	q5
 
 cdecl(gf_vect_dot_prod_sve):
+#ifdef __APPLE__
+	smstart	sm
+#endif
 	/* less than 16 bytes, return_fail */
 	cmp	x_len, #16
 	blt	.return_fail
@@ -82,7 +89,7 @@ cdecl(gf_vect_dot_prod_sve):
 /* Loop 1: x_len, vector length */
 .Lloopsve_vl:
 	whilelo	p0.b, x_pos, x_len
-	b.none	.return_pass
+	b.eq	.return_pass
 
 	mov	z_dest.b, #0			/* clear z_dest */
 	mov	x_vec_i, #0			/* clear x_vec_i */
@@ -125,8 +132,14 @@ cdecl(gf_vect_dot_prod_sve):
 
 .return_pass:
 	mov	w_ret, #0
+#ifdef __APPLE__
+	smstop	sm
+#endif
 	ret
 
 .return_fail:
 	mov	w_ret, #1
+#ifdef __APPLE__
+	smstop	sm
+#endif
 	ret
diff --git a/erasure_code/aarch64/gf_vect_mad_sve.S b/erasure_code/aarch64/gf_vect_mad_sve.S
index 41d6da9d..6e085c19 100644
--- a/erasure_code/aarch64/gf_vect_mad_sve.S
+++ b/erasure_code/aarch64/gf_vect_mad_sve.S
@@ -28,7 +28,11 @@
 **********************************************************************/
 .text
 .align		6
+#ifdef __APPLE__
+.arch		armv8-a+sme
+#else
 .arch		armv8-a+sve
+#endif
 
 #include "../include/aarch64_label.h"
 
@@ -72,6 +76,9 @@ q_gft1_lo	.req	q6
 q_gft1_hi	.req	q7
 
 cdecl(gf_vect_mad_sve):
+#ifdef __APPLE__
+	smstart	sm
+#endif
 	/* less than 16 bytes, return_fail */
 	cmp	x_len, #16
 	blt	.return_fail
@@ -87,7 +94,7 @@ cdecl(gf_vect_mad_sve):
 	/* vector length agnostic */
 .Lloopsve_vl:
 	whilelo	p0.b, x_pos, x_len
-	b.none	.return_pass
+	b.eq	.return_pass
 
 	/* prefetch dest data */
 	prfb	pldl2strm, p0, [x_dest, x_pos]
@@ -119,8 +126,14 @@ cdecl(gf_vect_mad_sve):
 
 .return_pass:
 	mov	w_ret, #0
+#ifdef __APPLE__
+	smstop	sm
+#endif
 	ret
 
 .return_fail:
 	mov	w_ret, #1
+#ifdef __APPLE__
+	smstop	sm
+#endif
 	ret
diff --git a/erasure_code/aarch64/gf_vect_mul_sve.S b/erasure_code/aarch64/gf_vect_mul_sve.S
index d2219bf5..c2453e3f 100644
--- a/erasure_code/aarch64/gf_vect_mul_sve.S
+++ b/erasure_code/aarch64/gf_vect_mul_sve.S
@@ -28,7 +28,11 @@
 **********************************************************************/
 .text
 .align		6
+#ifdef __APPLE__
+.arch		armv8-a+sme
+#else
 .arch		armv8-a+sve
+#endif
 
 #include "../include/aarch64_label.h"
 
@@ -78,6 +82,9 @@ q_gft1_lo	.req	q6
 q_gft1_hi	.req	q7
 
 cdecl(gf_vect_mul_sve):
+#ifdef __APPLE__
+	smstart	sm
+#endif
 	/* len not aligned to 32B, return_fail */
 	and	x_tmp, x_len, #0x1f
 	cmp	x_tmp, #0
@@ -92,7 +99,7 @@ cdecl(gf_vect_mul_sve):
 	/* vector length agnostic */
 .Lloopsve_vl:
 	whilelo	p0.b, x_pos, x_len
-	b.none	.return_pass
+	b.eq	.return_pass
 
 	/* load src data, governed by p0 */
 	ld1b	z_src.b,  p0/z, [x_src, x_pos]
@@ -116,8 +123,14 @@ cdecl(gf_vect_mul_sve):
 
 .return_pass:
 	mov	w_ret, #0
+#ifdef __APPLE__
+	smstop	sm
+#endif
 	ret
 
 .return_fail:
 	mov	w_ret, #1
+#ifdef __APPLE__
+	smstop	sm
+#endif
 	ret
diff --git a/include/aarch64_multibinary.h b/include/aarch64_multibinary.h
index c444f2bb..6059bb14 100644
--- a/include/aarch64_multibinary.h
+++ b/include/aarch64_multibinary.h
@@ -218,7 +218,7 @@
 #elif defined(__APPLE__)
 #define SYSCTL_PMULL_KEY "hw.optional.arm.FEAT_PMULL" // from macOS 12 FEAT_* sysctl infos are available
 #define SYSCTL_CRC32_KEY "hw.optional.armv8_crc32"
-#define SYSCTL_SVE_KEY "hw.optional.arm.FEAT_SVE" // this one is just a guess and need to check macOS update
+#define SYSCTL_SME_KEY "hw.optional.arm.FEAT_SME"
 #include <sys/sysctl.h>
 #include <stddef.h>
 static inline int sysctlEnabled(const char* name){