@@ -1506,19 +1506,49 @@ static bool isUnsupportedAMDGPUAddrspace(Value *Addr) {
15061506 return false ;
15071507}
15081508
1509- static bool isUnsupportedSPIRAccess (Value *Addr, Function *Func) {
1509+ static bool containsTargetExtType (const Type *Ty) {
1510+ if (isa<TargetExtType>(Ty))
1511+ return true ;
1512+
1513+ if (Ty->isVectorTy ())
1514+ return containsTargetExtType (Ty->getScalarType ());
1515+
1516+ if (Ty->isArrayTy ())
1517+ return containsTargetExtType (Ty->getArrayElementType ());
1518+
1519+ if (auto *STy = dyn_cast<StructType>(Ty)) {
1520+ for (unsigned int i = 0 ; i < STy->getNumElements (); i++)
1521+ if (containsTargetExtType (STy->getElementType (i)))
1522+ return true ;
1523+ return false ;
1524+ }
1525+
1526+ return false ;
1527+ }
1528+
1529+ static bool isUnsupportedSPIRAccess (Value *Addr, Instruction *Inst) {
15101530 // Skip SPIR-V built-in varibles
15111531 auto *OrigValue = Addr->stripInBoundsOffsets ();
15121532 if (OrigValue->getName ().starts_with (" __spirv_BuiltIn" ))
15131533 return true ;
15141534
1535+ // Ignore load/store for target ext type since we can't know exactly what size
1536+ // it is.
1537+ if (isa<StoreInst>(Inst) &&
1538+ containsTargetExtType (
1539+ cast<StoreInst>(Inst)->getValueOperand ()->getType ()))
1540+ return true ;
1541+
1542+ if (isa<LoadInst>(Inst) && containsTargetExtType (Inst->getType ()))
1543+ return true ;
1544+
15151545 Type *PtrTy = cast<PointerType>(Addr->getType ()->getScalarType ());
15161546 switch (PtrTy->getPointerAddressSpace ()) {
15171547 case kSpirOffloadPrivateAS : {
15181548 if (!ClSpirOffloadPrivates)
15191549 return true ;
15201550 // Skip kernel arguments
1521- return Func ->getCallingConv () == CallingConv::SPIR_KERNEL &&
1551+ return Inst-> getFunction () ->getCallingConv () == CallingConv::SPIR_KERNEL &&
15221552 isa<Argument>(Addr);
15231553 }
15241554 case kSpirOffloadGlobalAS : {
@@ -1756,7 +1786,10 @@ bool AddressSanitizer::isInterestingAlloca(const AllocaInst &AI) {
17561786 // swifterror allocas are register promoted by ISel
17571787 !AI.isSwiftError () &&
17581788 // safe allocas are not interesting
1759- !(SSGI && SSGI->isSafe (AI)));
1789+ !(SSGI && SSGI->isSafe (AI)) &&
1790+ // ignore alloc contains target ext type since we can't know exactly what
1791+ // size it is.
1792+ !containsTargetExtType (AI.getAllocatedType ()));
17601793
17611794 ProcessedAllocas[&AI] = IsInteresting;
17621795 return IsInteresting;
@@ -1765,7 +1798,7 @@ bool AddressSanitizer::isInterestingAlloca(const AllocaInst &AI) {
17651798bool AddressSanitizer::ignoreAccess (Instruction *Inst, Value *Ptr) {
17661799 // SPIR has its own rules to filter the instrument accesses
17671800 if (TargetTriple.isSPIROrSPIRV ()) {
1768- if (isUnsupportedSPIRAccess (Ptr, Inst-> getFunction () ))
1801+ if (isUnsupportedSPIRAccess (Ptr, Inst))
17691802 return true ;
17701803 } else {
17711804 // Instrument accesses from different address spaces only for AMDGPU.
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