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Revert "[SCCP] convert signed div/rem to unsigned for non-negative operands"
This reverts commit fe1f3cf. It looks like this commit breaks building llvm-test-suite. To reproduce, run `opt -passes=ipsccp` on the IR below. @g = internal global i32 256, align 4 define void @test() { entry: %0 = load i32, ptr @g, align 4 %div = sdiv i32 %0, undef ret void }
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4 files changed

+11
-44
lines changed

4 files changed

+11
-44
lines changed

‎llvm/lib/Transforms/Scalar/SCCP.cpp

Lines changed: 0 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -175,18 +175,6 @@ static bool replaceSignedInst(SCCPSolver &Solver,
175175
NewInst = new ZExtInst(Op0, Inst.getType(), "", &Inst);
176176
break;
177177
}
178-
case Instruction::SDiv:
179-
case Instruction::SRem: {
180-
// If both operands are not negative, this is the same as udiv/urem.
181-
Value *Op0 = Inst.getOperand(0), *Op1 = Inst.getOperand(1);
182-
if (InsertedValues.count(Op0) || InsertedValues.count(Op1) ||
183-
!isNonNegative(Op0) || !isNonNegative(Op1))
184-
return false;
185-
auto NewOpcode = Inst.getOpcode() == Instruction::SDiv ? Instruction::UDiv
186-
: Instruction::URem;
187-
NewInst = BinaryOperator::Create(NewOpcode, Op0, Op1, "", &Inst);
188-
break;
189-
}
190178
default:
191179
return false;
192180
}

‎llvm/test/Transforms/PhaseOrdering/srem.ll

Lines changed: 3 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -3,16 +3,13 @@
33
; RUN: opt -O2 -S < %s | FileCheck %s
44
; RUN: opt -O3 -S < %s | FileCheck %s
55

6-
; srem should be folded based on branch conditions
7-
; This can be done by IPSCCP or CVP.
8-
96
define i32 @PR57472(i32 noundef %x) {
107
; CHECK-LABEL: @PR57472(
118
; CHECK-NEXT: entry:
129
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[X:%.*]], -1
13-
; CHECK-NEXT: [[REM:%.*]] = and i32 [[X]], 15
14-
; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[CMP]], i32 [[REM]], i32 42
15-
; CHECK-NEXT: ret i32 [[SPEC_SELECT]]
10+
; CHECK-NEXT: [[REM:%.*]] = srem i32 [[X]], 16
11+
; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[REM]], i32 42
12+
; CHECK-NEXT: ret i32 [[COND]]
1613
;
1714
entry:
1815
%x.addr = alloca i32, align 4

‎llvm/test/Transforms/SCCP/binaryops-range-special-cases.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -130,7 +130,7 @@ define void @srem_cmp_constants() {
130130
; CHECK-NEXT: call void @use(i1 false)
131131
; CHECK-NEXT: call void @use(i1 true)
132132
; CHECK-NEXT: call void @use(i1 false)
133-
; CHECK-NEXT: [[SREM_3:%.*]] = urem i16 12704, 0
133+
; CHECK-NEXT: [[SREM_3:%.*]] = srem i16 12704, 0
134134
; CHECK-NEXT: [[C_5:%.*]] = icmp eq i16 [[SREM_3]], 1
135135
; CHECK-NEXT: call void @use(i1 [[C_5]])
136136
; CHECK-NEXT: ret void

‎llvm/test/Transforms/SCCP/divrem.ll

Lines changed: 7 additions & 25 deletions
Original file line numberDiff line numberDiff line change
@@ -5,7 +5,7 @@ define i8 @sdiv_nonneg0_nonneg1(i8 %x, i8 %y) {
55
; CHECK-LABEL: @sdiv_nonneg0_nonneg1(
66
; CHECK-NEXT: [[PX:%.*]] = and i8 [[X:%.*]], 127
77
; CHECK-NEXT: [[PY:%.*]] = lshr i8 [[Y:%.*]], 1
8-
; CHECK-NEXT: [[R:%.*]] = udiv i8 [[PX]], [[PY]]
8+
; CHECK-NEXT: [[R:%.*]] = sdiv i8 [[PX]], [[PY]]
99
; CHECK-NEXT: ret i8 [[R]]
1010
;
1111
%px = and i8 %x, 127
@@ -17,16 +17,14 @@ define i8 @sdiv_nonneg0_nonneg1(i8 %x, i8 %y) {
1717
define i8 @sdiv_nonnegconst0_nonneg1(i7 %y) {
1818
; CHECK-LABEL: @sdiv_nonnegconst0_nonneg1(
1919
; CHECK-NEXT: [[PY:%.*]] = zext i7 [[Y:%.*]] to i8
20-
; CHECK-NEXT: [[R:%.*]] = udiv i8 42, [[PY]]
20+
; CHECK-NEXT: [[R:%.*]] = sdiv i8 42, [[PY]]
2121
; CHECK-NEXT: ret i8 [[R]]
2222
;
2323
%py = zext i7 %y to i8
2424
%r = sdiv i8 42, %py
2525
ret i8 %r
2626
}
2727

28-
; TODO: This can be converted to udiv.
29-
3028
define i8 @sdiv_nonneg0_nonnegconst1(i8 %x) {
3129
; CHECK-LABEL: @sdiv_nonneg0_nonnegconst1(
3230
; CHECK-NEXT: [[PX:%.*]] = mul nsw i8 [[X:%.*]], [[X]]
@@ -38,8 +36,6 @@ define i8 @sdiv_nonneg0_nonnegconst1(i8 %x) {
3836
ret i8 %r
3937
}
4038

41-
; negative test
42-
4339
define i8 @sdiv_unknown0_nonneg1(i8 %x, i8 %y) {
4440
; CHECK-LABEL: @sdiv_unknown0_nonneg1(
4541
; CHECK-NEXT: [[PY:%.*]] = lshr i8 [[Y:%.*]], 1
@@ -51,8 +47,6 @@ define i8 @sdiv_unknown0_nonneg1(i8 %x, i8 %y) {
5147
ret i8 %r
5248
}
5349

54-
; negative test
55-
5650
define i8 @sdiv_nonnegconst0_unknown1(i7 %y) {
5751
; CHECK-LABEL: @sdiv_nonnegconst0_unknown1(
5852
; CHECK-NEXT: [[SY:%.*]] = sext i7 [[Y:%.*]] to i8
@@ -64,8 +58,6 @@ define i8 @sdiv_nonnegconst0_unknown1(i7 %y) {
6458
ret i8 %r
6559
}
6660

67-
; negative test - mul must be 'nsw' to be known non-negative
68-
6961
define i8 @sdiv_unknown0_nonnegconst1(i8 %x) {
7062
; CHECK-LABEL: @sdiv_unknown0_nonnegconst1(
7163
; CHECK-NEXT: [[SX:%.*]] = mul i8 [[X:%.*]], [[X]]
@@ -81,7 +73,7 @@ define i8 @srem_nonneg0_nonneg1(i8 %x, i8 %y) {
8173
; CHECK-LABEL: @srem_nonneg0_nonneg1(
8274
; CHECK-NEXT: [[PX:%.*]] = and i8 [[X:%.*]], 127
8375
; CHECK-NEXT: [[PY:%.*]] = lshr i8 [[Y:%.*]], 1
84-
; CHECK-NEXT: [[R:%.*]] = urem i8 [[PX]], [[PY]]
76+
; CHECK-NEXT: [[R:%.*]] = srem i8 [[PX]], [[PY]]
8577
; CHECK-NEXT: ret i8 [[R]]
8678
;
8779
%px = and i8 %x, 127
@@ -93,7 +85,7 @@ define i8 @srem_nonneg0_nonneg1(i8 %x, i8 %y) {
9385
define i8 @srem_nonnegconst0_nonneg1(i8 %y) {
9486
; CHECK-LABEL: @srem_nonnegconst0_nonneg1(
9587
; CHECK-NEXT: [[PY:%.*]] = and i8 [[Y:%.*]], 127
96-
; CHECK-NEXT: [[R:%.*]] = urem i8 42, [[PY]]
88+
; CHECK-NEXT: [[R:%.*]] = srem i8 42, [[PY]]
9789
; CHECK-NEXT: ret i8 [[R]]
9890
;
9991
%py = and i8 %y, 127
@@ -104,16 +96,14 @@ define i8 @srem_nonnegconst0_nonneg1(i8 %y) {
10496
define i8 @srem_nonneg0_nonnegconst1(i7 %x) {
10597
; CHECK-LABEL: @srem_nonneg0_nonnegconst1(
10698
; CHECK-NEXT: [[PX:%.*]] = zext i7 [[X:%.*]] to i8
107-
; CHECK-NEXT: [[R:%.*]] = urem i8 [[PX]], 42
99+
; CHECK-NEXT: [[R:%.*]] = srem i8 [[PX]], 42
108100
; CHECK-NEXT: ret i8 [[R]]
109101
;
110102
%px = zext i7 %x to i8
111103
%r = srem i8 %px, 42
112104
ret i8 %r
113105
}
114106

115-
; negative test
116-
117107
define i8 @srem_unknown0_nonneg1(i8 %x, i8 %y) {
118108
; CHECK-LABEL: @srem_unknown0_nonneg1(
119109
; CHECK-NEXT: [[PY:%.*]] = lshr i8 [[Y:%.*]], 1
@@ -125,8 +115,6 @@ define i8 @srem_unknown0_nonneg1(i8 %x, i8 %y) {
125115
ret i8 %r
126116
}
127117

128-
; negative test
129-
130118
define i8 @srem_nonnegconst0_unknown1(i7 %y) {
131119
; CHECK-LABEL: @srem_nonnegconst0_unknown1(
132120
; CHECK-NEXT: [[SY:%.*]] = sext i7 [[Y:%.*]] to i8
@@ -138,8 +126,6 @@ define i8 @srem_nonnegconst0_unknown1(i7 %y) {
138126
ret i8 %r
139127
}
140128

141-
; negative test - mul must be 'nsw' to be known non-negative
142-
143129
define i8 @srem_unknown0_nonnegconst1(i8 %x) {
144130
; CHECK-LABEL: @srem_unknown0_nonnegconst1(
145131
; CHECK-NEXT: [[SX:%.*]] = mul i8 [[X:%.*]], [[X]]
@@ -151,15 +137,13 @@ define i8 @srem_unknown0_nonnegconst1(i8 %x) {
151137
ret i8 %r
152138
}
153139

154-
; x is known non-negative in t block
155-
156140
define i32 @PR57472(i32 %x) {
157141
; CHECK-LABEL: @PR57472(
158142
; CHECK-NEXT: entry:
159143
; CHECK-NEXT: [[CMP:%.*]] = icmp sge i32 [[X:%.*]], 0
160144
; CHECK-NEXT: br i1 [[CMP]], label [[T:%.*]], label [[F:%.*]]
161145
; CHECK: t:
162-
; CHECK-NEXT: [[REM:%.*]] = urem i32 [[X]], 16
146+
; CHECK-NEXT: [[REM:%.*]] = srem i32 [[X]], 16
163147
; CHECK-NEXT: br label [[EXIT:%.*]]
164148
; CHECK: f:
165149
; CHECK-NEXT: br label [[EXIT]]
@@ -183,8 +167,6 @@ exit:
183167
ret i32 %cond
184168
}
185169

186-
; x is known non-negative in f block
187-
188170
define i32 @PR57472_alt(i32 %x) {
189171
; CHECK-LABEL: @PR57472_alt(
190172
; CHECK-NEXT: entry:
@@ -193,7 +175,7 @@ define i32 @PR57472_alt(i32 %x) {
193175
; CHECK: t:
194176
; CHECK-NEXT: br label [[EXIT:%.*]]
195177
; CHECK: f:
196-
; CHECK-NEXT: [[DIV:%.*]] = udiv i32 16, [[X]]
178+
; CHECK-NEXT: [[DIV:%.*]] = sdiv i32 16, [[X]]
197179
; CHECK-NEXT: br label [[EXIT]]
198180
; CHECK: exit:
199181
; CHECK-NEXT: [[COND:%.*]] = phi i32 [ -42, [[T]] ], [ [[DIV]], [[F]] ]

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