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[SYCL][ESIMD][E2E] Split some atomic update tests (#16580)
These are really slow so split them into two parts, we get like a 40 second speedup. Signed-off-by: Sarnie, Nick <[email protected]>
1 parent 99d8f68 commit 2cfe8e6

17 files changed

+278
-34
lines changed

‎sycl/test-e2e/ESIMD/unified_memory_api/Inputs/atomic_update.hpp‎

Lines changed: 27 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -118,7 +118,7 @@ bool verify(T *arr, const Config &cfg, size_t size) {
118118

119119
template <class T, int N, template <class, int> class ImplF, bool UseMask,
120120
bool UseProperties>
121-
bool test_usm(queue q, const Config &cfg) {
121+
bool test_usm(queue &q, const Config &cfg) {
122122
constexpr auto op = ImplF<T, N>::atomic_op;
123123
using CurAtomicOpT = decltype(op);
124124
constexpr int n_args = ImplF<T, N>::n_args;
@@ -245,7 +245,7 @@ bool test_usm(queue q, const Config &cfg) {
245245

246246
template <class T, int N, template <class, int> class ImplF, bool UseMask,
247247
bool UseProperties>
248-
bool test_acc(queue q, const Config &cfg) {
248+
bool test_acc(queue &q, const Config &cfg) {
249249
constexpr auto op = ImplF<T, N>::atomic_op;
250250
using CurAtomicOpT = decltype(op);
251251
constexpr int n_args = ImplF<T, N>::n_args;
@@ -615,7 +615,7 @@ struct ImplFcmpwr : ImplCmpxchgBase<T, N, atomic_op, atomic_op::fcmpxchg> {};
615615

616616
template <bool UseAcc, class T, int N, template <class, int> class ImplF,
617617
bool UseMask, bool UseLSCFeatures>
618-
auto run_test(queue q, const Config &cfg) {
618+
auto run_test(queue &q, const Config &cfg) {
619619
if constexpr (UseAcc)
620620
return test_acc<T, N, ImplF, UseMask, UseLSCFeatures>(q, cfg);
621621
else
@@ -624,7 +624,7 @@ auto run_test(queue q, const Config &cfg) {
624624

625625
template <int N, template <class, int> class Op, bool UseMask,
626626
bool UseLSCFeatures, bool UseAcc, int SignMask = (Signed | Unsigned)>
627-
bool test_int_types(queue q, const Config &cfg) {
627+
bool test_int_types(queue &q, const Config &cfg) {
628628
bool passed = true;
629629
if constexpr (SignMask & Signed) {
630630
// Supported by LSC atomic:
@@ -662,7 +662,7 @@ bool test_int_types(queue q, const Config &cfg) {
662662

663663
template <int N, template <class, int> class Op, bool UseMask,
664664
bool UseLSCFeatures, bool UseAcc>
665-
bool test_fp_types(queue q, const Config &cfg) {
665+
bool test_fp_types(queue &q, const Config &cfg) {
666666
bool passed = true;
667667
// TODO: Enable FADD/FSUB on DG2/PVC when the error in GPU driver is resolved.
668668
if constexpr (UseLSCFeatures &&
@@ -685,7 +685,7 @@ bool test_fp_types(queue q, const Config &cfg) {
685685

686686
template <template <class, int> class Op, bool UseMask, bool UseLSCFeatures,
687687
bool UseAcc, int SignMask = (Signed | Unsigned)>
688-
bool test_int_types_and_sizes(queue q, const Config &cfg) {
688+
bool test_int_types_and_sizes(queue &q, const Config &cfg) {
689689
bool passed = true;
690690
passed &=
691691
test_int_types<1, Op, UseMask, UseLSCFeatures, UseAcc, SignMask>(q, cfg);
@@ -715,7 +715,7 @@ bool test_int_types_and_sizes(queue q, const Config &cfg) {
715715

716716
template <template <class, int> class Op, bool UseMask, bool UseLSCFeatures,
717717
bool UseAcc>
718-
bool test_fp_types_and_sizes(queue q, const Config &cfg) {
718+
bool test_fp_types_and_sizes(queue &q, const Config &cfg) {
719719
bool passed = true;
720720
passed &= test_fp_types<1, Op, UseMask, UseLSCFeatures, UseAcc>(q, cfg);
721721
passed &= test_fp_types<2, Op, UseMask, UseLSCFeatures, UseAcc>(q, cfg);
@@ -733,7 +733,7 @@ bool test_fp_types_and_sizes(queue q, const Config &cfg) {
733733
}
734734

735735
template <bool UseMask, bool UseLSCFeatures, bool UseAcc>
736-
bool test_with_mask(queue q) {
736+
bool test_with_mask(queue &q) {
737737
bool passed = true;
738738

739739
Config cfg{
@@ -818,26 +818,37 @@ bool test_with_mask(queue q) {
818818
return passed;
819819
}
820820

821-
template <bool UseLSCFeatures> bool test_main(queue q) {
821+
template <bool UseLSCFeatures, bool PartOne> bool test_main(queue &q) {
822822
bool passed = true;
823823

824824
constexpr const bool UseMask = true;
825825
constexpr const bool UseAcc = true;
826-
827-
passed &= test_with_mask<UseMask, UseLSCFeatures, !UseAcc>(q);
828-
passed &= test_with_mask<!UseMask, UseLSCFeatures, !UseAcc>(q);
826+
if constexpr (PartOne)
827+
passed &= test_with_mask<UseMask, UseLSCFeatures, !UseAcc>(q);
828+
else
829+
passed &= test_with_mask<!UseMask, UseLSCFeatures, !UseAcc>(q);
829830

830831
return passed;
831832
}
832833

833-
template <bool UseLSCFeatures> bool test_main_acc(queue q) {
834+
template <bool UseLSCFeature> bool test_main(queue &q) {
835+
return test_main<UseLSCFeature, true>(q) &&
836+
test_main<UseLSCFeature, false>(q);
837+
}
838+
839+
template <bool UseLSCFeatures, bool PartOne> bool test_main_acc(queue &q) {
834840
bool passed = true;
835841

836842
constexpr const bool UseMask = true;
837843
constexpr const bool UseAcc = true;
838-
839-
passed &= test_with_mask<UseMask, UseLSCFeatures, UseAcc>(q);
840-
passed &= test_with_mask<!UseMask, UseLSCFeatures, UseAcc>(q);
844+
if constexpr (PartOne)
845+
passed &= test_with_mask<UseMask, UseLSCFeatures, UseAcc>(q);
846+
else
847+
passed &= test_with_mask<!UseMask, UseLSCFeatures, UseAcc>(q);
841848

842849
return passed;
843850
}
851+
template <bool UseLSCFeatures> bool test_main_acc(queue &q) {
852+
return test_main_acc<UseLSCFeatures, true>(q) &&
853+
test_main_acc<UseLSCFeatures, false>(q);
854+
}

‎sycl/test-e2e/ESIMD/unified_memory_api/Inputs/atomic_update_slm.hpp‎

Lines changed: 26 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -78,7 +78,7 @@ template <int N> inline bool any(simd_mask<N> m, simd_mask<N> ignore_mask) {
7878
// The main test function
7979

8080
template <class T, int N, template <class, int> class ImplF, bool UseMask>
81-
bool test_slm(queue q) {
81+
bool test_slm(queue &q) {
8282
constexpr auto op = ImplF<T, N>::atomic_op;
8383
using CurAtomicOpT = decltype(op);
8484
constexpr int n_args = ImplF<T, N>::n_args;
@@ -202,7 +202,7 @@ bool test_slm(queue q) {
202202
}
203203

204204
template <class T, int N, template <class, int> class ImplF, bool UseMask>
205-
bool test_slm_acc(queue q) {
205+
bool test_slm_acc(queue &q) {
206206
constexpr auto op = ImplF<T, N>::atomic_op;
207207
using CurAtomicOpT = decltype(op);
208208
constexpr int n_args = ImplF<T, N>::n_args;
@@ -542,7 +542,7 @@ struct ImplLSCFcmpwr : ImplCmpxchgBase<T, N, atomic_op, atomic_op::fcmpxchg> {};
542542

543543
template <bool UseAcc, class T, int N, template <class, int> class ImplF,
544544
bool UseMask>
545-
auto run_test(queue q) {
545+
auto run_test(queue &q) {
546546
if constexpr (UseAcc) {
547547
return test_slm_acc<T, N, ImplF, UseMask>(q);
548548
} else {
@@ -553,7 +553,7 @@ auto run_test(queue q) {
553553
template <int N, template <class, int> class Op, bool UseMask,
554554
TestFeatures Features, bool UseAcc,
555555
int SignMask = (Signed | Unsigned)>
556-
bool test_int_types(queue q) {
556+
bool test_int_types(queue &q) {
557557
bool passed = true;
558558
if constexpr (SignMask & Signed) {
559559
if constexpr (Features == TestFeatures::DG2 ||
@@ -585,7 +585,7 @@ bool test_int_types(queue q) {
585585

586586
template <int N, template <class, int> class Op, bool UseMask,
587587
TestFeatures Features, bool UseAcc>
588-
bool test_fp_types(queue q) {
588+
bool test_fp_types(queue &q) {
589589
bool passed = true;
590590

591591
// TODO: Enable 'half' FADD/FSUB on DG2 when the error in GPU driver is fixed.
@@ -612,7 +612,7 @@ bool test_fp_types(queue q) {
612612

613613
template <template <class, int> class Op, bool UseMask, TestFeatures Features,
614614
bool UseAcc, int SignMask = (Signed | Unsigned)>
615-
bool test_int_types_and_sizes(queue q) {
615+
bool test_int_types_and_sizes(queue &q) {
616616
bool passed = true;
617617
passed &= test_int_types<1, Op, UseMask, Features, UseAcc, SignMask>(q);
618618
passed &= test_int_types<2, Op, UseMask, Features, UseAcc, SignMask>(q);
@@ -636,7 +636,7 @@ bool test_int_types_and_sizes(queue q) {
636636

637637
template <template <class, int> class Op, bool UseMask, TestFeatures Features,
638638
bool UseAcc>
639-
bool test_fp_types_and_sizes(queue q) {
639+
bool test_fp_types_and_sizes(queue &q) {
640640
bool passed = true;
641641
passed &= test_fp_types<1, Op, UseMask, Features, UseAcc>(q);
642642
passed &= test_fp_types<2, Op, UseMask, Features, UseAcc>(q);
@@ -656,7 +656,7 @@ bool test_fp_types_and_sizes(queue q) {
656656
}
657657

658658
template <bool UseMask, TestFeatures Features, bool UseAcc>
659-
int test_with_mask(queue q) {
659+
int test_with_mask(queue &q) {
660660
bool passed = true;
661661
#ifndef CMPXCHG_TEST
662662
passed &= test_int_types_and_sizes<ImplInc, UseMask, Features, UseAcc>(q);
@@ -708,26 +708,38 @@ int test_with_mask(queue q) {
708708
return passed;
709709
}
710710

711-
template <TestFeatures Features> bool test_main(queue q) {
711+
template <TestFeatures Features, bool PartOne> bool test_main(queue &q) {
712712
bool passed = true;
713713

714714
constexpr const bool UseMask = true;
715715
constexpr const bool UseAcc = true;
716716

717-
passed &= test_with_mask<UseMask, Features, !UseAcc>(q);
718-
passed &= test_with_mask<!UseMask, Features, !UseAcc>(q);
717+
if constexpr (PartOne)
718+
passed &= test_with_mask<UseMask, Features, !UseAcc>(q);
719+
else
720+
passed &= test_with_mask<!UseMask, Features, !UseAcc>(q);
719721

720722
return passed;
721723
}
722724

723-
template <TestFeatures Features> bool test_main_acc(queue q) {
725+
template <TestFeatures Features> bool test_main(queue &q) {
726+
return test_main<Features, true>(q) && test_main<Features, false>(q);
727+
}
728+
729+
template <TestFeatures Features, bool PartOne> bool test_main_acc(queue &q) {
724730
bool passed = true;
725731

726732
constexpr const bool UseMask = true;
727733
constexpr const bool UseAcc = true;
728734

729-
passed &= test_with_mask<UseMask, Features, UseAcc>(q);
730-
passed &= test_with_mask<!UseMask, Features, UseAcc>(q);
735+
if constexpr (PartOne)
736+
passed &= test_with_mask<UseMask, Features, UseAcc>(q);
737+
else
738+
passed &= test_with_mask<!UseMask, Features, UseAcc>(q);
731739

732740
return passed;
733741
}
742+
743+
template <TestFeatures Features> bool test_main_acc(queue &q) {
744+
return test_main_acc<Features, true>(q) && test_main_acc<Features, false>(q);
745+
}

‎sycl/test-e2e/ESIMD/unified_memory_api/atomic_update_acc_dg2_pvc.cpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -19,7 +19,7 @@ int main(void) {
1919
esimd_test::printTestLabel(q);
2020

2121
constexpr bool TestCacheHintProperties = true;
22-
bool passed = test_main_acc<TestCacheHintProperties>(q);
22+
bool passed = test_main_acc<TestCacheHintProperties, true>(q);
2323

2424
std::cout << (passed ? "Passed\n" : "FAILED\n");
2525
return passed ? 0 : 1;

‎sycl/test-e2e/ESIMD/unified_memory_api/atomic_update_acc_dg2_pvc_2.cpp‎

Lines changed: 26 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,26 @@
1+
//==---- atomic_update_acc_dg2_pvc_2.cpp - DPC++ ESIMD on-device test ---==//
2+
//
3+
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4+
// See https://llvm.org/LICENSE.txt for license information.
5+
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6+
//
7+
//===-------------------------------------------------------------------===//
8+
9+
// REQUIRES: arch-intel_gpu_pvc || gpu-intel-dg2
10+
11+
// RUN: %{build} -o %t.out
12+
// RUN: %{run} %t.out
13+
14+
#include "Inputs/atomic_update.hpp"
15+
16+
int main(void) {
17+
queue q(esimd_test::ESIMDSelector, esimd_test::createExceptionHandler());
18+
19+
esimd_test::printTestLabel(q);
20+
21+
constexpr bool TestCacheHintProperties = true;
22+
bool passed = test_main_acc<TestCacheHintProperties, false>(q);
23+
24+
std::cout << (passed ? "Passed\n" : "FAILED\n");
25+
return passed ? 0 : 1;
26+
}

‎sycl/test-e2e/ESIMD/unified_memory_api/atomic_update_acc_dg2_pvc_64_2.cpp‎

Lines changed: 17 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,17 @@
1+
//==-- atomic_update_acc_dg2_pvc_64_2.cpp - DPC++ ESIMD on-device test----==//
2+
//
3+
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4+
// See https://llvm.org/LICENSE.txt for license information.
5+
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6+
//
7+
//===--------------------------------------------------------------===//
8+
9+
// REQUIRES: arch-intel_gpu_pvc || gpu-intel-dg2
10+
11+
// RUN: %{build} -fsycl-esimd-force-stateless-mem -o %t.out
12+
// RUN: %{run} %t.out
13+
14+
// 64-bit offset is supported for accessors only in stateless mode
15+
#define USE_64_BIT_OFFSET
16+
17+
#include "atomic_update_acc_dg2_pvc_2.cpp"

‎sycl/test-e2e/ESIMD/unified_memory_api/atomic_update_acc_dg2_pvc_cmpxchg_2.cpp‎

Lines changed: 17 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,17 @@
1+
//=- atomic_update_acc_dg2_pvc_cmpxchg_2.cpp- DPC++ ESIMD on-device test -=//
2+
//
3+
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4+
// See https://llvm.org/LICENSE.txt for license information.
5+
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6+
//
7+
//===---------------------------------------------------------------------===//
8+
9+
// REQUIRES: arch-intel_gpu_pvc || gpu-intel-dg2
10+
// REQUIRES-INTEL-DRIVER: lin: 29803
11+
12+
// RUN: %{build} -o %t.out
13+
// RUN: %{run} %t.out
14+
15+
#define CMPXCHG_TEST
16+
17+
#include "atomic_update_acc_dg2_pvc_2.cpp"

‎sycl/test-e2e/ESIMD/unified_memory_api/atomic_update_acc_dg2_pvc_stateless_2.cpp‎

Lines changed: 14 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,14 @@
1+
//=- atomic_update_acc_dg2_pvc_stateless_2.cpp - DPC++ ESIMD on-device test -=//
2+
//
3+
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4+
// See https://llvm.org/LICENSE.txt for license information.
5+
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6+
//
7+
//=-----------------------------------------------------------------------=//
8+
9+
// REQUIRES: arch-intel_gpu_pvc || gpu-intel-dg2
10+
11+
// RUN: %{build} -fsycl-esimd-force-stateless-mem -o %t.out
12+
// RUN: %{run} %t.out
13+
14+
#include "atomic_update_acc_dg2_pvc_2.cpp"

‎sycl/test-e2e/ESIMD/unified_memory_api/atomic_update_slm_acc_pvc.cpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -19,7 +19,7 @@ int main(void) {
1919
esimd_test::printTestLabel(q);
2020

2121
constexpr auto Features = TestFeatures::PVC;
22-
bool passed = test_main_acc<Features>(q);
22+
bool passed = test_main_acc<Features, true>(q);
2323

2424
std::cout << (passed ? "Passed\n" : "FAILED\n");
2525
return passed ? 0 : 1;

‎sycl/test-e2e/ESIMD/unified_memory_api/atomic_update_slm_acc_pvc_2.cpp‎

Lines changed: 26 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,26 @@
1+
//==- atomic_update_slm_acc_pvc_2.cpp - DPC++ ESIMD on-device test -==//
2+
//
3+
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4+
// See https://llvm.org/LICENSE.txt for license information.
5+
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6+
//
7+
//===----------------------------------------------------------------------===//
8+
9+
// REQUIRES: arch-intel_gpu_pvc
10+
11+
// RUN: %{build} -o %t.out
12+
// RUN: %{run} %t.out
13+
14+
#include "Inputs/atomic_update_slm.hpp"
15+
16+
int main(void) {
17+
queue q(esimd_test::ESIMDSelector, esimd_test::createExceptionHandler());
18+
19+
esimd_test::printTestLabel(q);
20+
21+
constexpr auto Features = TestFeatures::PVC;
22+
bool passed = test_main_acc<Features, false>(q);
23+
24+
std::cout << (passed ? "Passed\n" : "FAILED\n");
25+
return passed ? 0 : 1;
26+
}

‎sycl/test-e2e/ESIMD/unified_memory_api/atomic_update_slm_acc_pvc_cmpxchg_2.cpp‎

Lines changed: 16 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,16 @@
1+
//=- atomic_update_slm_acc_pvc_cmpxchg_2.cpp -- DPC++ ESIMD on-device test -=//
2+
//
3+
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4+
// See https://llvm.org/LICENSE.txt for license information.
5+
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6+
//
7+
//===----------------------------------------------------------------------===//
8+
9+
// REQUIRES: arch-intel_gpu_pvc
10+
11+
// RUN: %{build} -o %t.out
12+
// RUN: %{run} %t.out
13+
14+
#define CMPXCHG_TEST
15+
16+
#include "atomic_update_slm_acc_pvc_2.cpp"

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