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Paul C. Anagnostopoulos
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[AMDGPU] [TableGen] Clean up !if(!eq(boolean, 1) and related booleans
Differential Revision: https://reviews.llvm.org/D89796
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‎llvm/lib/Target/AMDGPU/SIInstrInfo.td

Lines changed: 22 additions & 22 deletions
Original file line numberDiff line numberDiff line change
@@ -1651,20 +1651,20 @@ class getIns64 <RegisterOperand Src0RC, RegisterOperand Src1RC,
16511651
(ins),
16521652
/* else */
16531653
!if (!eq(NumSrcArgs, 1),
1654-
!if (!eq(HasModifiers, 1),
1654+
!if (HasModifiers,
16551655
// VOP1 with modifiers
16561656
(ins Src0Mod:$src0_modifiers, Src0RC:$src0,
16571657
clampmod0:$clamp, omod0:$omod)
16581658
/* else */,
16591659
// VOP1 without modifiers
1660-
!if (!eq(HasIntClamp, 1),
1660+
!if (HasIntClamp,
16611661
(ins Src0RC:$src0, clampmod0:$clamp),
16621662
(ins Src0RC:$src0))
16631663
/* endif */ ),
16641664
!if (!eq(NumSrcArgs, 2),
1665-
!if (!eq(HasModifiers, 1),
1665+
!if (HasModifiers,
16661666
// VOP 2 with modifiers
1667-
!if( !eq(HasOMod, 1),
1667+
!if(HasOMod,
16681668
(ins Src0Mod:$src0_modifiers, Src0RC:$src0,
16691669
Src1Mod:$src1_modifiers, Src1RC:$src1,
16701670
clampmod0:$clamp, omod0:$omod),
@@ -1673,21 +1673,21 @@ class getIns64 <RegisterOperand Src0RC, RegisterOperand Src1RC,
16731673
clampmod0:$clamp))
16741674
/* else */,
16751675
// VOP2 without modifiers
1676-
!if (!eq(HasIntClamp, 1),
1676+
!if (HasIntClamp,
16771677
(ins Src0RC:$src0, Src1RC:$src1, clampmod0:$clamp),
16781678
(ins Src0RC:$src0, Src1RC:$src1))
16791679

16801680
/* endif */ )
16811681
/* NumSrcArgs == 3 */,
1682-
!if (!eq(HasModifiers, 1),
1683-
!if (!eq(HasSrc2Mods, 1),
1682+
!if (HasModifiers,
1683+
!if (HasSrc2Mods,
16841684
// VOP3 with modifiers
1685-
!if (!eq(HasOMod, 1),
1685+
!if (HasOMod,
16861686
(ins Src0Mod:$src0_modifiers, Src0RC:$src0,
16871687
Src1Mod:$src1_modifiers, Src1RC:$src1,
16881688
Src2Mod:$src2_modifiers, Src2RC:$src2,
16891689
clampmod0:$clamp, omod0:$omod),
1690-
!if (!eq(HasIntClamp, 1),
1690+
!if (HasIntClamp,
16911691
(ins Src0Mod:$src0_modifiers, Src0RC:$src0,
16921692
Src1Mod:$src1_modifiers, Src1RC:$src1,
16931693
Src2Mod:$src2_modifiers, Src2RC:$src2,
@@ -1696,11 +1696,11 @@ class getIns64 <RegisterOperand Src0RC, RegisterOperand Src1RC,
16961696
Src1Mod:$src1_modifiers, Src1RC:$src1,
16971697
Src2Mod:$src2_modifiers, Src2RC:$src2))),
16981698
// VOP3 with modifiers except src2
1699-
!if (!eq(HasOMod, 1),
1699+
!if (HasOMod,
17001700
(ins Src0Mod:$src0_modifiers, Src0RC:$src0,
17011701
Src1Mod:$src1_modifiers, Src1RC:$src1,
17021702
Src2RC:$src2, clampmod0:$clamp, omod0:$omod),
1703-
!if (!eq(HasIntClamp, 1),
1703+
!if (HasIntClamp,
17041704
(ins Src0Mod:$src0_modifiers, Src0RC:$src0,
17051705
Src1Mod:$src1_modifiers, Src1RC:$src1,
17061706
Src2RC:$src2, clampmod0:$clamp),
@@ -1709,7 +1709,7 @@ class getIns64 <RegisterOperand Src0RC, RegisterOperand Src1RC,
17091709
Src2RC:$src2))))
17101710
/* else */,
17111711
// VOP3 without modifiers
1712-
!if (!eq(HasIntClamp, 1),
1712+
!if (HasIntClamp,
17131713
(ins Src0RC:$src0, Src1RC:$src1, Src2RC:$src2, clampmod0:$clamp),
17141714
(ins Src0RC:$src0, Src1RC:$src1, Src2RC:$src2))
17151715
/* endif */ ))));
@@ -1791,7 +1791,7 @@ class getInsDPP <RegisterOperand DstRC, RegisterClass Src0RC, RegisterClass Src1
17911791
(ins dpp_ctrl:$dpp_ctrl, row_mask:$row_mask,
17921792
bank_mask:$bank_mask, bound_ctrl:$bound_ctrl),
17931793
!if (!eq(NumSrcArgs, 1),
1794-
!if (!eq(HasModifiers, 1),
1794+
!if (HasModifiers,
17951795
// VOP1_DPP with modifiers
17961796
(ins DstRC:$old, Src0Mod:$src0_modifiers,
17971797
Src0RC:$src0, dpp_ctrl:$dpp_ctrl, row_mask:$row_mask,
@@ -1803,7 +1803,7 @@ class getInsDPP <RegisterOperand DstRC, RegisterClass Src0RC, RegisterClass Src1
18031803
bank_mask:$bank_mask, bound_ctrl:$bound_ctrl)
18041804
/* endif */)
18051805
/* NumSrcArgs == 2 */,
1806-
!if (!eq(HasModifiers, 1),
1806+
!if (HasModifiers,
18071807
// VOP2_DPP with modifiers
18081808
(ins DstRC:$old,
18091809
Src0Mod:$src0_modifiers, Src0RC:$src0,
@@ -1834,7 +1834,7 @@ class getInsDPP8 <RegisterOperand DstRC, RegisterClass Src0RC, RegisterClass Src
18341834
// VOP1 without input operands (V_NOP)
18351835
(ins dpp8:$dpp8, FI:$fi),
18361836
!if (!eq(NumSrcArgs, 1),
1837-
!if (!eq(HasModifiers, 1),
1837+
!if (HasModifiers,
18381838
// VOP1_DPP with modifiers
18391839
(ins DstRC:$old, Src0Mod:$src0_modifiers,
18401840
Src0RC:$src0, dpp8:$dpp8, FI:$fi)
@@ -1843,7 +1843,7 @@ class getInsDPP8 <RegisterOperand DstRC, RegisterClass Src0RC, RegisterClass Src
18431843
(ins DstRC:$old, Src0RC:$src0, dpp8:$dpp8, FI:$fi)
18441844
/* endif */)
18451845
/* NumSrcArgs == 2 */,
1846-
!if (!eq(HasModifiers, 1),
1846+
!if (HasModifiers,
18471847
// VOP2_DPP with modifiers
18481848
(ins DstRC:$old,
18491849
Src0Mod:$src0_modifiers, Src0RC:$src0,
@@ -1867,7 +1867,7 @@ class getInsSDWA <RegisterOperand Src0RC, RegisterOperand Src1RC, int NumSrcArgs
18671867
(ins),
18681868
!if(!eq(NumSrcArgs, 1),
18691869
// VOP1
1870-
!if(!eq(HasSDWAOMod, 0),
1870+
!if(!not(HasSDWAOMod),
18711871
// VOP1_SDWA without omod
18721872
(ins Src0Mod:$src0_modifiers, Src0RC:$src0,
18731873
clampmod:$clamp,
@@ -1885,7 +1885,7 @@ class getInsSDWA <RegisterOperand Src0RC, RegisterOperand Src1RC, int NumSrcArgs
18851885
Src1Mod:$src1_modifiers, Src1RC:$src1,
18861886
clampmod:$clamp, src0_sel:$src0_sel, src1_sel:$src1_sel),
18871887
// VOP2_SDWA
1888-
!if(!eq(HasSDWAOMod, 0),
1888+
!if(!not(HasSDWAOMod),
18891889
// VOP2_SDWA without omod
18901890
(ins Src0Mod:$src0_modifiers, Src0RC:$src0,
18911891
Src1Mod:$src1_modifiers, Src1RC:$src1,
@@ -1945,7 +1945,7 @@ class getAsm64 <bit HasDst, int NumSrcArgs, bit HasIntClamp, bit HasModifiers,
19451945
string src2 = !if(!eq(NumSrcArgs, 3), " $src2_modifiers", "");
19461946
string iclamp = !if(HasIntClamp, "$clamp", "");
19471947
string ret =
1948-
!if(!eq(HasModifiers, 0),
1948+
!if(!not(HasModifiers),
19491949
getAsm32<HasDst, NumSrcArgs, DstVT>.ret # iclamp,
19501950
dst#", "#src0#src1#src2#"$clamp"#!if(HasOMod, "$omod", ""));
19511951
}
@@ -2007,7 +2007,7 @@ class getAsmDPP <bit HasDst, int NumSrcArgs, bit HasModifiers, ValueType DstVT =
20072007
string src1 = !if(!eq(NumSrcArgs, 1), "",
20082008
!if(!eq(NumSrcArgs, 2), " $src1_modifiers",
20092009
" $src1_modifiers,"));
2010-
string args = !if(!eq(HasModifiers, 0),
2010+
string args = !if(!not(HasModifiers),
20112011
getAsm32<0, NumSrcArgs, DstVT>.ret,
20122012
", "#src0#src1);
20132013
string ret = dst#args#" $dpp_ctrl$row_mask$bank_mask$bound_ctrl";
@@ -2027,7 +2027,7 @@ class getAsmDPP8 <bit HasDst, int NumSrcArgs, bit HasModifiers, ValueType DstVT
20272027
string src1 = !if(!eq(NumSrcArgs, 1), "",
20282028
!if(!eq(NumSrcArgs, 2), " $src1_modifiers",
20292029
" $src1_modifiers,"));
2030-
string args = !if(!eq(HasModifiers, 0),
2030+
string args = !if(!not(HasModifiers),
20312031
getAsm32<0, NumSrcArgs, DstVT>.ret,
20322032
", "#src0#src1);
20332033
string ret = dst#args#"$dpp8$fi";
@@ -2070,7 +2070,7 @@ class getAsmSDWA9 <bit HasDst, bit HasOMod, int NumSrcArgs,
20702070
"");
20712071
string src0 = "$src0_modifiers";
20722072
string src1 = "$src1_modifiers";
2073-
string out_mods = !if(!eq(HasOMod, 0), "$clamp", "$clamp$omod");
2073+
string out_mods = !if(!not(HasOMod), "$clamp", "$clamp$omod");
20742074
string args = !if(!eq(NumSrcArgs, 0), "",
20752075
!if(!eq(NumSrcArgs, 1),
20762076
", "#src0,

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