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8 | 8 | ========
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9 | 9 |
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10 | 10 | As one of the goals of SPIR-V is to `"map easily to other IRs, including LLVM
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11 |
| -IR" <https://cvs.khronos.org/svn/repos/SPIRV/trunk/specs/SPIRV.html#_goals>`_, |
| 11 | +IR" <https://www.khronos.org/registry/spir-v/specs/unified1/SPIRV.html#_goals>`_, |
12 | 12 | most of SPIR-V entities (global variables, constants, types, functions, basic
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13 | 13 | blocks, instructions) have straightforward counterparts in LLVM. Therefore the
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14 | 14 | focus of this document is those entities in SPIR-V which do not map to LLVM in
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@@ -81,7 +81,7 @@ Some SPIR-V instructions which can be included in basic blocks do not have
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81 | 81 | corresponding LLVM instructions or intrinsics. These SPIR-V instructions are
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82 | 82 | represented by function calls in LLVM. The function corresponding to a SPIR-V
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83 | 83 | instruction is termed SPIR-V builtin function and its name is `IA64 mangled
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84 |
| -<https://mentorembedded.github.io/cxx-abi/abi.html#mangling>`_ with extensions |
| 84 | +<https://itanium-cxx-abi.github.io/cxx-abi/abi.html#mangling>`_ with extensions |
85 | 85 | for SPIR-V specific types. The unmangled name of a SPIR-V builtin function
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86 | 86 | follows the convention
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87 | 87 |
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@@ -209,7 +209,7 @@ following format:
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209 | 209 |
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210 | 210 | .. code-block:: llvm
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211 | 211 |
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212 |
| - !spirv.<OpCodeName> = !{!<InstructionMetadata1>, <InstructionMetadata2>, ..} |
| 212 | + !spirv.<OpCodeName> = !{!<InstructionMetadata1>, !<InstructionMetadata2>, ..} |
213 | 213 | !<InstructionMetadata1> = !{<Operand1>, <Operand2>, ..}
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214 | 214 | !<InstructionMetadata2> = !{<Operand1>, <Operand2>, ..}
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215 | 215 |
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