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sarnexsarnex
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Merge remote-tracking branch 'upstream/sycl' into e2echeck
2 parents 8ffc24c + 3f56c58 commit 5174536

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9 files changed

+168
-60
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9 files changed

+168
-60
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‎buildbot/configure.py‎

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -64,7 +64,7 @@ def do_configure(args):
6464

6565
sycl_enable_xpti_tracing = "ON"
6666
xpti_enable_werror = "OFF"
67-
llvm_enable_zstd = "OFF"
67+
llvm_enable_zstd = "ON"
6868

6969
if sys.platform != "darwin":
7070
sycl_enabled_backends.append("level_zero")
@@ -134,8 +134,6 @@ def do_configure(args):
134134

135135
# For clang-format, clang-tidy and code coverage
136136
llvm_enable_projects += ";clang-tools-extra;compiler-rt"
137-
# Build with zstd disabled on CI for now.
138-
llvm_enable_zstd = "OFF"
139137
if sys.platform != "darwin":
140138
# libclc is required for CI validation
141139
libclc_enabled = True

‎clang/include/clang/Driver/Action.h‎

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -698,6 +698,14 @@ class OffloadWrapperJobAction : public JobAction {
698698
// Get the compilation step setting.
699699
bool getCompileStep() const { return CompileStep; }
700700

701+
// Set the individual wrapping setting. This is used to tell the wrapper job
702+
// action that the wrapping (and subsequent compile step) should be done
703+
// with for-each instead of using -batch.
704+
void setWrapIndividualFiles() { WrapIndividualFiles = true; }
705+
706+
// Get the individual wrapping setting.
707+
bool getWrapIndividualFiles() const { return WrapIndividualFiles; }
708+
701709
// Set the offload kind for the current wrapping job action. Default usage
702710
// is to use the kind of the current toolchain.
703711
void setOffloadKind(OffloadKind SetKind) { Kind = SetKind; }
@@ -707,6 +715,7 @@ class OffloadWrapperJobAction : public JobAction {
707715

708716
private:
709717
bool CompileStep = true;
718+
bool WrapIndividualFiles = false;
710719
OffloadKind Kind = OFK_None;
711720
};
712721

‎clang/lib/Driver/Driver.cpp‎

Lines changed: 60 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -5536,9 +5536,58 @@ class OffloadingActionBuilder final {
55365536
BundlingActions, types::TY_Object);
55375537
if (auto *OWA = dyn_cast<OffloadWrapperJobAction>(DeviceAction))
55385538
OWA->setOffloadKind(Action::OFK_Host);
5539+
// The Backend compilation step performed here is being done for
5540+
// creating FPGA archives. The possible split binaries after
5541+
// sycl-post-link need to be individually wrapped as opposed to
5542+
// being passed into the clang-offload-wrapper via a table and
5543+
// using the -batch option - effectively creating a single
5544+
// binary. The resulting archive created from -fsycl-link should
5545+
// not contain the singular binary, but should be individual
5546+
// binaries to be consumed later by either the -fsycl-link=image
5547+
// device compilation step or being linked into the final exe.
5548+
//
5549+
// Typical compile flow:
5550+
// .bc
5551+
// |
5552+
// sycl-post-link -split=kernel
5553+
// |
5554+
// +--------+--------+
5555+
// | | |
5556+
// split1 split2 split3
5557+
// | | |
5558+
// llvm-spirv llvm-spirv llvm-spirv
5559+
// | | |
5560+
// ocloc ocloc ocloc
5561+
// | | |
5562+
// +--------+--------+
5563+
// |
5564+
// clang-offload-wrapper -batch
5565+
// |
5566+
// .o
5567+
//
5568+
// Individual wrap compile flow:
5569+
// .bc
5570+
// |
5571+
// sycl-post-link -split=kernel
5572+
// |
5573+
// +--------+--------+
5574+
// | | |
5575+
// split1 split2 split3
5576+
// | | |
5577+
// llvm-spirv llvm-spirv llvm-spirv
5578+
// | | |
5579+
// ocloc ocloc ocloc
5580+
// | | |
5581+
// wrap wrap wrap
5582+
// | | |
5583+
// .o .o .o
5584+
//
55395585
Action *CompiledDeviceAction =
5540-
C.MakeAction<OffloadWrapperJobAction>(WrapperItems,
5541-
types::TY_Object);
5586+
C.MakeAction<OffloadWrapperJobAction>(FPGAAOTAction,
5587+
types::TY_Tempfilelist);
5588+
if (auto *OWA =
5589+
dyn_cast<OffloadWrapperJobAction>(CompiledDeviceAction))
5590+
OWA->setWrapIndividualFiles();
55425591
addDeps(CompiledDeviceAction, TC, BoundArch);
55435592
}
55445593
addDeps(DeviceAction, TC, BoundArch);
@@ -5812,6 +5861,9 @@ class OffloadingActionBuilder final {
58125861
};
58135862

58145863
Action *ExtractIRFilesAction = createExtractIRFilesAction();
5864+
// Device binaries that are individually wrapped when creating an
5865+
// FPGA Archive.
5866+
ActionList FPGAArchiveWrapperInputs;
58155867

58165868
if (IsNVPTX || IsAMDGCN) {
58175869
JobAction *FinAction =
@@ -5897,6 +5949,7 @@ class OffloadingActionBuilder final {
58975949
FileTableTformJobAction::COL_CODE,
58985950
FileTableTformJobAction::COL_CODE);
58995951
WrapperInputs.push_back(ReplaceFilesAction);
5952+
FPGAArchiveWrapperInputs.push_back(BuildCodeAction);
59005953
}
59015954
if (SkipWrapper) {
59025955
// Wrapper step not requested.
@@ -5931,8 +5984,11 @@ class OffloadingActionBuilder final {
59315984
if (auto *OWA = dyn_cast<OffloadWrapperJobAction>(DeviceAction))
59325985
OWA->setOffloadKind(Action::OFK_Host);
59335986
Action *CompiledDeviceAction =
5934-
C.MakeAction<OffloadWrapperJobAction>(WrapperInputs,
5935-
types::TY_Object);
5987+
C.MakeAction<OffloadWrapperJobAction>(
5988+
FPGAArchiveWrapperInputs, types::TY_Tempfilelist);
5989+
if (auto *OWA =
5990+
dyn_cast<OffloadWrapperJobAction>(CompiledDeviceAction))
5991+
OWA->setWrapIndividualFiles();
59365992
addDeps(CompiledDeviceAction, TC, nullptr);
59375993
}
59385994
addDeps(DeviceAction, TC, nullptr);

‎clang/lib/Driver/ToolChains/Clang.cpp‎

Lines changed: 36 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -10263,8 +10263,18 @@ void OffloadWrapper::ConstructJob(Compilation &C, const JobAction &JA,
1026310263
const InputInfo &I = Inputs[0];
1026410264
assert(I.isFilename() && "Invalid input.");
1026510265

10266-
if (I.getType() == types::TY_Tempfiletable ||
10267-
I.getType() == types::TY_Tempfilelist || IsEmbeddedIR)
10266+
// TODO: The embedded compilation step after the wrapping step restricts
10267+
// the ability to control the 'for each' methodology used when performing
10268+
// device code splitting. We set the individual wrap behavior when we know
10269+
// the wrapping and compile step should be done individually. Ideally this
10270+
// would be controlled at the JobAction creation, but we cannot do that
10271+
// until the compilation of the wrap is it's own JobAction.
10272+
bool IndividualWrapCompile = WrapperJob.getWrapIndividualFiles();
10273+
const InputInfo TempOutput(types::TY_LLVM_BC, WrapperFileName,
10274+
WrapperFileName);
10275+
if (!IndividualWrapCompile &&
10276+
(I.getType() == types::TY_Tempfiletable ||
10277+
I.getType() == types::TY_Tempfilelist || IsEmbeddedIR))
1026810278
// Input files are passed via the batch job file table.
1026910279
WrapperArgs.push_back(C.getArgs().MakeArgString("-batch"));
1027010280
WrapperArgs.push_back(C.getArgs().MakeArgString(I.getFilename()));
@@ -10273,7 +10283,17 @@ void OffloadWrapper::ConstructJob(Compilation &C, const JobAction &JA,
1027310283
JA, *this, ResponseFileSupport::None(),
1027410284
TCArgs.MakeArgString(getToolChain().GetProgramPath(getShortName())),
1027510285
WrapperArgs, std::nullopt);
10276-
C.addCommand(std::move(Cmd));
10286+
10287+
if (IndividualWrapCompile) {
10288+
// When wrapping FPGA device binaries for FPGA archives, create individual
10289+
// wrapped and compiled entries for the archive.
10290+
StringRef ParallelJobs =
10291+
C.getArgs().getLastArgValue(options::OPT_fsycl_max_parallel_jobs_EQ);
10292+
clang::driver::tools::SYCL::constructLLVMForeachCommand(
10293+
C, JA, std::move(Cmd), Inputs, TempOutput, this, "", "bc",
10294+
ParallelJobs);
10295+
} else
10296+
C.addCommand(std::move(Cmd));
1027710297

1027810298
if (WrapperCompileEnabled) {
1027910299
// TODO Use TC.SelectTool().
@@ -10296,9 +10316,19 @@ void OffloadWrapper::ConstructJob(Compilation &C, const JobAction &JA,
1029610316
SmallString<128> ClangPath(C.getDriver().Dir);
1029710317
llvm::sys::path::append(ClangPath, "clang");
1029810318
const char *Clang = C.getArgs().MakeArgString(ClangPath);
10299-
C.addCommand(std::make_unique<Command>(JA, *this,
10300-
ResponseFileSupport::None(), Clang,
10301-
ClangArgs, std::nullopt));
10319+
auto PostWrapCompileCmd =
10320+
std::make_unique<Command>(JA, *this, ResponseFileSupport::None(),
10321+
Clang, ClangArgs, std::nullopt);
10322+
if (IndividualWrapCompile) {
10323+
StringRef ParallelJobs = C.getArgs().getLastArgValue(
10324+
options::OPT_fsycl_max_parallel_jobs_EQ);
10325+
InputInfoList Inputs;
10326+
Inputs.push_back(TempOutput);
10327+
clang::driver::tools::SYCL::constructLLVMForeachCommand(
10328+
C, JA, std::move(PostWrapCompileCmd), Inputs, Output, this, "",
10329+
"bc", ParallelJobs);
10330+
} else
10331+
C.addCommand(std::move(PostWrapCompileCmd));
1030210332
}
1030310333
return;
1030410334
} // end of SYCL flavor of offload wrapper command creation

‎clang/test/Driver/sycl-offload-intelfpga-emu.cpp‎

Lines changed: 24 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -21,14 +21,17 @@
2121
// CHK-FPGA-LINK: llvm-spirv{{.*}} "-o" "[[OUTPUT3:.+\.txt]]" "-spirv-max-version={{.*}}"{{.*}} "[[TABLEOUT]]"
2222
// CHK-FPGA-EARLY: opencl-aot{{.*}} "-device=fpga_fast_emu" "-spv=[[OUTPUT3]]" "-ir=[[OUTPUT4:.+\.aocr]]" "--bo=-g"
2323
// CHK-FPGA-IMAGE: opencl-aot{{.*}} "-device=fpga_fast_emu" "-spv=[[OUTPUT3]]" "-ir=[[OUTPUT4:.+\.aocx]]" "--bo=-g"
24+
// CHK-FPGA-LINK: clang-offload-wrapper{{.*}} "-o=[[WRAPOUT:.+\.bc]]" "-host=x86_64-unknown-linux-gnu" {{.*}} "-kind=sycl" "[[OUTPUT4]]"
25+
// CHK-FPGA-LINK: clang{{.*}} "-c" "-o" "[[OBJOUTDEV:.+\.txt]]" "[[WRAPOUT]]"
2426
// CHK-FPGA-LINK: file-table-tform{{.*}} "-replace=Code,Code" "-o" "[[TABLEOUT2:.+\.table]]" "[[OUTPUT2]]" "[[OUTPUT4]]"
25-
// CHK-FPGA-LINK: clang-offload-wrapper{{.*}} "-o=[[WRAPOUT:.+\.bc]]" "-host=x86_64-unknown-linux-gnu" {{.*}} "-kind=sycl" "-batch" "[[TABLEOUT2]]"
26-
// CHK-FPGA-LINK: clang{{.*}} "-c" "-o" "[[OBJOUTDEV:.+\.o]]" "[[WRAPOUT]]"
27+
// CHK-FPGA-EARLY: clang-offload-wrapper{{.*}} "-o=[[WRAPPEROUT_O:.+\.o]]" "-host=x86_64-unknown-linux-gnu" "-target=fpga_aocr_emu-intel-unknown" "-kind=sycl" "-batch" "[[TABLEOUT2]]"
28+
// CHK-FPGA-EARLY: clang-offload-wrapper{{.*}} "-host=x86_64-unknown-linux-gnu"{{.*}} "-target=fpga_aocr_emu-intel-unknown" "-kind=host" "[[WRAPPEROUT_O]]"
29+
// CHK-FPGA-EARLY: clang{{.*}} "-c" "-o" "[[WRAPWRAPOUT:.+\.o]]"
30+
// CHK-FPGA-EARLY: llvm-ar{{.*}} "cqL" "libfoo.a" "[[OBJOUT]]" "@[[OBJOUTDEV]]" "[[WRAPWRAPOUT]]"
2731
// CHK-FPGA-IMAGE: clang-offload-wrapper{{.*}} "-o=[[WRAPPEROUT_O:.+\.o]]" "-host=x86_64-unknown-linux-gnu" "--emit-reg-funcs=0" "-target=fpga_aocx-intel-unknown" "-kind=sycl" "-batch" "[[TABLEOUT2]]"
2832
// CHK-FPGA-IMAGE: clang-offload-wrapper{{.*}} "-host=x86_64-unknown-linux-gnu"{{.*}} "-target=fpga_aocx-intel-unknown" "-kind=host" "[[WRAPPEROUT_O]]"
2933
// CHK-FPGA-IMAGE: clang{{.*}} "-c" "-o" "[[WRAPWRAPOUT:.+\.o]]"
30-
// CHK-FPGA-EARLY: llvm-ar{{.*}} "cqL" "libfoo.a" "[[OBJOUT]]" "[[OBJOUTDEV]]"
31-
// CHK-FPGA-IMAGE: llvm-ar{{.*}} "cqL" "libfoo.a" "[[OBJOUT]]"{{.*}} "[[WRAPWRAPOUT]]"
34+
// CHK-FPGA-IMAGE: llvm-ar{{.*}} "cqL" "libfoo.a" "[[OBJOUT]]" "@[[OBJOUTDEV]]" "[[WRAPWRAPOUT]]"
3235

3336
/// -fintelfpga -fsycl-link clang-cl specific
3437
// RUN: touch %t.obj
@@ -45,10 +48,13 @@
4548
// CHK-FPGA-LINK-WIN: file-table-tform{{.*}} "-o" "[[TABLEOUT:.+\.txt]]" "[[OUTPUT2]]"
4649
// CHK-FPGA-LINK-WIN: llvm-spirv{{.*}} "-o" "[[OUTPUT3:.+\.txt]]" "-spirv-max-version={{.*}}"{{.*}} "[[TABLEOUT]]"
4750
// CHK-FPGA-LINK-WIN: opencl-aot{{.*}} "-device=fpga_fast_emu" "-spv=[[OUTPUT3]]" "-ir=[[OUTPUT4:.+\.aocr]]" "--bo=-g"
51+
// CHK-FPGA-LINK-WIN: clang-offload-wrapper{{.*}} "-o=[[WRAPOUT:.+\.bc]]" {{.*}} "-kind=sycl" "[[OUTPUT4]]"
52+
// CHK-FPGA-LINK-WIN: clang{{.*}} "-c" "-o" "[[OBJOUTDEV:.+\.txt]]" "[[WRAPOUT]]"
4853
// CHK-FPGA-LINK-WIN: file-table-tform{{.*}} "-replace=Code,Code" "-o" "[[TABLEOUT2:.+\.table]]" "[[OUTPUT2]]" "[[OUTPUT4]]"
49-
// CHK-FPGA-LINK-WIN: clang-offload-wrapper{{.*}} "-o=[[WRAPOUT:.+\.bc]]" {{.*}} "-kind=sycl" "-batch" "[[TABLEOUT2]]"
50-
// CHK-FPGA-LINK-WIN: clang{{.*}} "-c" "-o" "[[OBJOUTDEV:.+\.obj]]" "[[WRAPOUT]]"
51-
// CHK-FPGA-LINK-WIN: lib.exe{{.*}} "[[OBJOUT]]" "[[OBJOUTDEV]]" {{.*}} "-OUT:libfoo.lib"
54+
// CHK-FPGA-LINK-WIN: clang-offload-wrapper{{.*}} "-o=[[WRAPOUT2:.+\.obj]]" {{.*}} "-kind=sycl" "-batch" "[[TABLEOUT2]]"
55+
// CHK-FPGA-LINK-WIN: clang-offload-wrapper{{.*}} "-o=[[WRAPWRAPOUT:.+\.bc]]" {{.*}} "-kind=host" "[[WRAPOUT2]]"
56+
// CHK-FPGA-LINK-WIN: clang{{.*}} "-c" "-o" "[[OUTDEV:.+\.obj]]" "[[WRAPWRAPOUT]]"
57+
// CHK-FPGA-LINK-WIN: lib.exe{{.*}} "[[OBJOUT]]" "@[[OBJOUTDEV]]" "[[OUTDEV]]" {{.*}} "-OUT:libfoo.lib"
5258

5359
/// Check -fintelfpga -fsycl-link with an FPGA archive
5460
// Create the dummy archive
@@ -71,26 +77,23 @@
7177
// CHK-FPGA-LINK-LIB: clang{{.*}} "-o" "[[OUTPUT_O:.+\.o]]" "-x" "ir" "[[WRAPPED_AOCR_LIST_BC]]"
7278
// CHK-FPGA-LINK-LIB: clang-offload-bundler{{.*}} "-type=aocr" "-targets=sycl-fpga_aocr_emu-intel-unknown" "-input=[[INPUT]]" "-output=[[OUTPUT2:.+\.aocr]]" "-unbundle"
7379
// CHK-FPGA-LINK-LIB-IMAGE: llvm-foreach{{.*}} "--out-ext=aocx" "--in-file-list=[[OUTPUT2]]" "--in-replace=[[OUTPUT2]]" "--out-file-list=[[OUTPUT3:.+\.aocx]]" "--out-replace=[[OUTPUT3]]" "--" "{{.*}}opencl-aot{{.*}} "-device=fpga_fast_emu" "-spv=[[OUTPUT2]]" "-ir=[[OUTPUT3]]" "--bo=-g"
80+
// CHK-FPGA-LINK-LIB-IMAGE: clang-offload-wrapper{{.*}} "-o=[[WRAPOUT:.+\.bc]]" "-host=x86_64-unknown-linux-gnu"{{.*}} "-target=fpga_aocx-intel-unknown" "-kind=sycl" "[[OUTPUT3]]"
81+
// CHK-FPGA-LINK-LIB-IMAGE: clang{{.*}} "-c"{{.*}} "[[WRAPOUT]]"
7482
// CHK-FPGA-LINK-LIB-IMAGE: file-table-tform{{.*}} "-rename=0,Code" "-o" "[[OUTPUT4:.+\.txt]]" "[[OUTPUT3]]"
7583
// CHK-FPGA-LINK-LIB-IMAGE: clang-offload-bundler{{.*}} "-type=aoo" "-targets=host-fpga_aocr_emu-intel-unknown" "-input=[[INPUT]]" "-output=[[OUTPUT_BUNDLE_BC:.+\.txt]]" "-unbundle"
7684
// CHK-FPGA-LINK-LIB-IMAGE: file-table-tform{{.*}} "-rename=0,SymAndProps" "-o" "[[OUTPUT_BC2:.+\.txt]]" "[[OUTPUT_BUNDLE_BC]]"
77-
// CHK-FPGA-LINK-LIB-IMAGE: clang-offload-wrapper{{.*}} "-o=[[WRAPPED_SYM_PROP:.+\.bc]]" "-host=x86_64-unknown-linux-gnu" "--emit-reg-funcs=0" "-target=fpga_aocx-intel-unknown" "-kind=sycl" "--sym-prop-bc-files=[[OUTPUT_BC2]]" "-batch" "[[OUTPUT4]]"
78-
// CHK-FPGA-LINK-LIB-IMAGE: clang{{.*}} "-c"{{.*}} "[[WRAPPED_SYM_PROP]]"
79-
// CHK-FPGA-LINK-LIB-IMAGE: clang-offload-wrapper{{.*}} "-o=[[WRAPPED_SYM_PROP2:.+\.o]]" "-host=x86_64-unknown-linux-gnu" "--emit-reg-funcs=0" "-target=fpga_aocx-intel-unknown" "-kind=sycl" "--sym-prop-bc-files=[[OUTPUT_BC2]]" "-batch" "[[OUTPUT4]]"
80-
// CHK-FPGA-LINK-LIB-IMAGE: clang-offload-wrapper{{.*}} "-o=[[WRAPWRAP_SYM_PROP:.+\.bc]]" "-host=x86_64-unknown-linux-gnu"{{.*}} "-target=fpga_aocx-intel-unknown" "-kind=host" "[[WRAPPED_SYM_PROP2]]"
85+
// CHK-FPGA-LINK-LIB-IMAGE: clang-offload-wrapper{{.*}} "-o=[[WRAPPED_SYM_PROP:.+\.o]]" "-host=x86_64-unknown-linux-gnu" "--emit-reg-funcs=0" "-target=fpga_aocx-intel-unknown" "-kind=sycl" "--sym-prop-bc-files=[[OUTPUT_BC2]]" "-batch" "[[OUTPUT4]]"
86+
// CHK-FPGA-LINK-LIB-IMAGE: clang-offload-wrapper{{.*}} "-o=[[WRAPWRAP_SYM_PROP:.+\.bc]]" "-host=x86_64-unknown-linux-gnu"{{.*}} "-target=fpga_aocx-intel-unknown" "-kind=host" "[[WRAPPED_SYM_PROP]]"
8187
// CHK-FPGA-LINK-LIB-IMAGE: clang{{.*}} "-c"{{.*}} "[[WRAPWRAP_SYM_PROP]]"
8288
// CHK-FPGA-LINK-LIB-EARLY: llvm-foreach{{.*}} "--out-ext=aocr" "--in-file-list=[[OUTPUT2]]" "--in-replace=[[OUTPUT2]]" "--out-file-list=[[OUTPUT3:.+\.aocr]]" "--out-replace=[[OUTPUT3]]" "--" "{{.*}}opencl-aot{{.*}}" "-device=fpga_fast_emu" "-spv=[[OUTPUT2]]" "-ir=[[OUTPUT3]]" "--bo=-g"
8389
// CHK-FPGA-LINK-LIB-EARLY: file-table-tform{{.*}} "-rename=0,Code" "-o" "[[OUTPUT4:.+\.txt]]" "[[OUTPUT3]]"
8490
// CHK-FPGA-LINK-LIB-EARLY: clang-offload-bundler{{.*}} "-type=aoo" "-targets=host-fpga_aocr_emu-intel-unknown" "-input=[[INPUT]]" "-output=[[OUTPUT_BUNDLE_BC:.+\.txt]]" "-unbundle"
8591
// CHK-FPGA-LINK-LIB-EARLY: file-table-tform{{.*}} "-rename=0,SymAndProps" "-o" "[[OUTPUT_BC2:.+\.txt]]" "[[OUTPUT_BUNDLE_BC]]"
86-
// CHK-FPGA-LINK-LIB-EARLY: clang-offload-wrapper{{.*}} "-o=[[WRAPPED_SYM_PROP:.+\.bc]]" "-host=x86_64-unknown-linux-gnu" "-target=fpga_aocr_emu-intel-unknown" "-kind=sycl" "--sym-prop-bc-files=[[OUTPUT_BC2]]" "-batch" "[[OUTPUT4]]"
87-
// CHK-FPGA-LINK-LIB-EARLY: clang{{.*}} "-c"{{.*}} "[[WRAPPED_SYM_PROP]]"
88-
// CHK-FPGA-LINK-LIB-EARLY: clang-offload-wrapper{{.*}} "-o=[[WRAPPED_SYM_PROP2:.+\.o]]" "-host=x86_64-unknown-linux-gnu" "-target=fpga_aocr_emu-intel-unknown" "-kind=sycl" "--sym-prop-bc-files=[[OUTPUT_BC2]]" "-batch" "[[OUTPUT4]]"
89-
// CHK-FPGA-LINK-LIB-EARLY: clang-offload-wrapper{{.*}} "-o=[[WRAPWRAP_SYM_PROP:.+\.bc]]" "-host=x86_64-unknown-linux-gnu"{{.*}} "-target=fpga_aocr_emu-intel-unknown" "-kind=host" "[[WRAPPED_SYM_PROP2]]"
92+
// CHK-FPGA-LINK-LIB-EARLY: clang-offload-wrapper{{.*}} "-o=[[WRAPPED_SYM_PROP:.+\.o]]" "-host=x86_64-unknown-linux-gnu" "-target=fpga_aocr_emu-intel-unknown" "-kind=sycl" "--sym-prop-bc-files=[[OUTPUT_BC2]]" "-batch" "[[OUTPUT4]]"
93+
// CHK-FPGA-LINK-LIB-EARLY: clang-offload-wrapper{{.*}} "-o=[[WRAPWRAP_SYM_PROP:.+\.bc]]" "-host=x86_64-unknown-linux-gnu"{{.*}} "-target=fpga_aocr_emu-intel-unknown" "-kind=host" "[[WRAPPED_SYM_PROP]]"
9094
// CHK-FPGA-LINK-LIB-EARLY: clang{{.*}} "-c"{{.*}} "[[WRAPWRAP_SYM_PROP]]"
9195
// CHK-FPGA-LINK-LIB: llvm-ar{{.*}} "cqL" {{.*}} "[[OUTPUT_O]]"
9296

93-
9497
/// Check the warning's emission for conflicting emulation/hardware
9598
// RUN: touch %t-aocr.a
9699
// RUN: %clangxx -fintelfpga -fsycl-link=image -target x86_64-unknown-linux-gnu %t-aocr.a %s -Xshardware -### 2>&1 \
@@ -240,13 +243,13 @@
240243
// CHK-FPGA-LINK-SRC: 15: file-table-tform, {14}, tempfilelist, (device-sycl)
241244
// CHK-FPGA-LINK-SRC: 16: llvm-spirv, {15}, tempfilelist, (device-sycl)
242245
// CHK-FPGA-LINK-SRC: 17: backend-compiler, {16}, fpga_aocr_emu, (device-sycl)
243-
// CHK-FPGA-LINK-SRC: 18: file-table-tform, {14, 17}, tempfiletable, (device-sycl)
244-
// CHK-FPGA-LINK-SRC: 19: clang-offload-wrapper, {18}, object, (device-sycl)
245-
// CHK-FPGA-LINK-SRC: 20: offload, "device-sycl (spir64_fpga-unknown-unknown)" {19}, object
246-
// CHK-FPGA-LINK-SRC: 21: clang-offload-wrapper, {18}, object, (device-sycl)
246+
// CHK-FPGA-LINK-SRC: 18: clang-offload-wrapper, {17}, tempfilelist, (device-sycl)
247+
// CHK-FPGA-LINK-SRC: 19: offload, "device-sycl (spir64_fpga-unknown-unknown)" {18}, tempfilelist
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// CHK-FPGA-LINK-SRC: 20: file-table-tform, {14, 17}, tempfiletable, (device-sycl)
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// CHK-FPGA-LINK-SRC: 21: clang-offload-wrapper, {20}, object, (device-sycl)
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// CHK-FPGA-LINK-SRC: 22: clang-offload-wrapper, {21}, object, (device-sycl)
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// CHK-FPGA-LINK-SRC: 23: offload, "device-sycl (spir64_fpga-unknown-unknown)" {22}, object
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// CHK-FPGA-LINK-SRC: 24: linker, {12, 20, 23}, archive, (host-sycl)
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// CHK-FPGA-LINK-SRC: 24: linker, {12, 19, 23}, archive, (host-sycl)
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/// Check for implied options with emulation (-g -O0)
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// RUN: %clang -### -target x86_64-unknown-linux-gnu -fintelfpga -g -O0 -Xs "-DFOO1 -DFOO2" %s 2>&1 \

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