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mdtoguchimdtoguchi
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[Driver][SYCL] Properly pass object contents with FPGA archives
The recent commit 2df7d3f introduced an issue when passing along the host objects in the early (AOCR) archive and consumed by the image (AOCX) archive. Package up (wrap) the images instead of just the list of images by using the -batch functionality with the clang-offload-wrapper.
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+34
-6
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4 files changed

+34
-6
lines changed

‎clang/lib/Driver/Driver.cpp‎

Lines changed: 21 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -7446,8 +7446,27 @@ void Driver::BuildActions(Compilation &C, DerivedArgList &Args,
74467446
if (Args.hasArg(options::OPT_fsycl_link_EQ) &&
74477447
Args.hasArg(options::OPT_fintelfpga)) {
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// Wrap the object when creating an FPGA AOCX or AOCR binary.
7449-
auto *BC = C.MakeAction<OffloadWrapperJobAction>(LI, types::TY_LLVM_BC);
7450-
auto *ASM = C.MakeAction<BackendJobAction>(BC, types::TY_PP_Asm);
7449+
// When the input file is an AOCR (early) archive, the unbundled host
7450+
// binary consists of a list of objects. We cannot directly wrap that
7451+
// binary to be consumed later - this has to go through each listed
7452+
// object.
7453+
bool FPGAEarly = true;
7454+
if (auto *A = C.getInputArgs().getLastArg(options::OPT_fsycl_link_EQ))
7455+
FPGAEarly = (A->getValue() != StringRef("image"));
7456+
7457+
Action *WrapperAction;
7458+
if ((LI->getType() == types::TY_FPGA_AOCR ||
7459+
LI->getType() == types::TY_FPGA_AOCR_EMU) && !FPGAEarly) {
7460+
auto *RenameAction = C.MakeAction<FileTableTformJobAction>(
7461+
LI, types::TY_Tempfilelist, types::TY_Tempfilelist);
7462+
RenameAction->addRenameColumnTform(
7463+
FileTableTformJobAction::COL_ZERO,
7464+
FileTableTformJobAction::COL_CODE);
7465+
ActionList WrapperItems({RenameAction});
7466+
WrapperAction = C.MakeAction<OffloadWrapperJobAction>(WrapperItems, types::TY_LLVM_BC);
7467+
} else
7468+
WrapperAction = C.MakeAction<OffloadWrapperJobAction>(LI, types::TY_LLVM_BC);
7469+
auto *ASM = C.MakeAction<BackendJobAction>(WrapperAction, types::TY_PP_Asm);
74517470
auto *OBJ = C.MakeAction<AssembleJobAction>(ASM, types::TY_Object);
74527471
OffloadAction::HostDependence HDep(
74537472
*OBJ, *C.getSingleOffloadToolChain<Action::OFK_Host>(),

‎clang/lib/Driver/ToolChains/Clang.cpp‎

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -10283,6 +10283,11 @@ void OffloadWrapper::ConstructJob(Compilation &C, const JobAction &JA,
1028310283
CmdArgs.push_back(
1028410284
TCArgs.MakeArgString(Twine("-target=") + Triple.getTriple()));
1028510285

10286+
if (Inputs[0].getType() == types::TY_Tempfiletable ||
10287+
Inputs[0].getType() == types::TY_Tempfilelist)
10288+
// wrapper actual input files are passed via the batch job file table:
10289+
CmdArgs.push_back(C.getArgs().MakeArgString("-batch"));
10290+
1028610291
// Add input.
1028710292
assert(Inputs[0].isFilename() && "Invalid input.");
1028810293
CmdArgs.push_back(TCArgs.MakeArgString(Inputs[0].getFilename()));

‎clang/test/Driver/sycl-offload-intelfpga-emu.cpp‎

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -64,8 +64,10 @@
6464
// RUN: | FileCheck -check-prefixes=CHK-FPGA-LINK-LIB,CHK-FPGA-LINK-LIB-EARLY %s
6565

6666
// CHK-FPGA-LINK-LIB: clang-offload-bundler{{.*}} "-type=ao" "-targets=sycl-fpga_aocr_emu-intel-unknown" "-input={{.*}}" "-check-section"
67-
// CHK-FPGA-LINK-LIB: clang-offload-bundler{{.*}} "-type=aoo" "-targets=host-x86_64-unknown-linux-gnu" "-input=[[INPUT:.+\.a]]" "-output=[[OUTPUT1:.+\.txt]]" "-unbundle"
68-
// CHK-FPGA-LINK-LIB: clang-offload-wrapper{{.*}} "-host" "x86_64-unknown-linux-gnu" "-o" "[[WRAPPED_AOCR_LIST_BC:.+\.bc]]" "-kind=host" "-target=x86_64-unknown-linux-gnu" "[[OUTPUT1]]"
67+
// CHK-FPGA-LINK-LIB-EARLY: clang-offload-bundler{{.*}} "-type=aoo" "-targets=host-x86_64-unknown-linux-gnu" "-input=[[INPUT:.+\.a]]" "-output=[[OUTPUT1:.+\.txt]]" "-unbundle"
68+
// CHK-FPGA-LINK-LIB-IMAGE: clang-offload-bundler{{.*}} "-type=aoo" "-targets=host-x86_64-unknown-linux-gnu" "-input=[[INPUT:.+\.a]]" "-output=[[BOUTPUT:.+\.txt]]" "-unbundle"
69+
// CHK-FPGA-LINK-LIB-IMAGE: file-table-tform{{.*}} "-rename=0,Code" "-o" "[[OUTPUT1:.+\.txt]]" "[[BOUTPUT]]"
70+
// CHK-FPGA-LINK-LIB: clang-offload-wrapper{{.*}} "-host" "x86_64-unknown-linux-gnu" "-o" "[[WRAPPED_AOCR_LIST_BC:.+\.bc]]" "-kind=host" "-target=x86_64-unknown-linux-gnu" "-batch" "[[OUTPUT1]]"
6971
// CHK-FPGA-LINK-LIB: clang{{.*}} "-o" "[[OUTPUT_O:.+\.o]]" "-x" "ir" "[[WRAPPED_AOCR_LIST_BC]]"
7072
// CHK-FPGA-LINK-LIB: clang-offload-bundler{{.*}} "-type=aocr" "-targets=sycl-fpga_aocr_emu-intel-unknown" "-input=[[INPUT]]" "-output=[[OUTPUT2:.+\.aocr]]" "-unbundle"
7173
// CHK-FPGA-LINK-LIB-IMAGE: llvm-foreach{{.*}} "--out-ext=aocx" "--in-file-list=[[OUTPUT2]]" "--in-replace=[[OUTPUT2]]" "--out-file-list=[[OUTPUT3:.+\.aocx]]" "--out-replace=[[OUTPUT3]]" "--" "{{.*}}opencl-aot{{.*}} "-device=fpga_fast_emu" "-spv=[[OUTPUT2]]" "-ir=[[OUTPUT3]]" "--bo=-g"

‎clang/test/Driver/sycl-offload-intelfpga-link.cpp‎

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -67,8 +67,10 @@
6767
// RUN: | FileCheck -check-prefixes=CHK-FPGA-LINK-LIB,CHK-FPGA-LINK-LIB-EARLY %s
6868
// CHK-FPGA-LINK-LIB: clang-offload-bundler{{.*}} "-type=ao" "-targets=sycl-fpga_aocx-intel-unknown" "-input={{.*}}" "-check-section"
6969
// CHK-FPGA-LINK-LIB: clang-offload-bundler{{.*}} "-type=ao" "-targets=sycl-fpga_aocr-intel-unknown" "-input={{.*}}" "-check-section"
70-
// CHK-FPGA-LINK-LIB: clang-offload-bundler{{.*}} "-type=aoo" "-targets=host-x86_64-unknown-linux-gnu" "-input=[[INPUT:.+\.a]]" "-output=[[OUTPUT1:.+\.txt]]" "-unbundle"
71-
// CHK-FPGA-LINK-LIB: clang-offload-wrapper{{.*}} "-host" "x86_64-unknown-linux-gnu" "-o" "[[WRAPPED_AOCR_LIST_BC:.+\.bc]]" "-kind=host" "-target=x86_64-unknown-linux-gnu" "[[OUTPUT1]]"
70+
// CHK-FPGA-LINK-LIB-EARLY: clang-offload-bundler{{.*}} "-type=aoo" "-targets=host-x86_64-unknown-linux-gnu" "-input=[[INPUT:.+\.a]]" "-output=[[OUTPUT1:.+\.txt]]" "-unbundle"
71+
// CHK-FPGA-LINK-LIB-IMAGE: clang-offload-bundler{{.*}} "-type=aoo" "-targets=host-x86_64-unknown-linux-gnu" "-input=[[INPUT:.+\.a]]" "-output=[[BOUTPUT:.+\.txt]]" "-unbundle"
72+
// CHK-FPGA-LINK-LIB-IMAGE: file-table-tform{{.*}} "-rename=0,Code" "-o" "[[OUTPUT1:.+\.txt]]" "[[BOUTPUT]]"
73+
// CHK-FPGA-LINK-LIB: clang-offload-wrapper{{.*}} "-host" "x86_64-unknown-linux-gnu" "-o" "[[WRAPPED_AOCR_LIST_BC:.+\.bc]]" "-kind=host" "-target=x86_64-unknown-linux-gnu" "-batch" "[[OUTPUT1]]"
7274
// CHK-FPGA-LINK-LIB: clang{{.*}} "-o" "[[OUTPUT_O:.+\.o]]" "-x" "ir" "[[WRAPPED_AOCR_LIST_BC]]"
7375
// CHK-FPGA-LINK-LIB: clang-offload-bundler{{.*}} "-type=aocr" "-targets=sycl-fpga_aocr-intel-unknown" "-input=[[INPUT]]" "-output=[[OUTPUT2:.+\.aocr]]" "-unbundle"
7476
// CHK-FPGA-LINK-LIB-IMAGE: llvm-foreach{{.*}} "--out-ext=aocx" "--in-file-list=[[OUTPUT2]]" "--in-replace=[[OUTPUT2]]" "--out-file-list=[[OUTPUT3:.+\.aocx]]" "--out-replace=[[OUTPUT3]]" "--out-increment=a.prj" "--" "{{.*}}aoc{{.*}}" "-o" "[[OUTPUT3]]" "[[OUTPUT2]]" "-sycl" "-output-report-folder=a.prj" "-g"

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