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lines changed Original file line number Diff line number Diff line change @@ -496,11 +496,10 @@ void CodeGenRegister::computeSecondarySubRegs(CodeGenRegBank &RegBank) {
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assert (getSubRegIndex (SubReg) == SubRegIdx && " LeadingSuperRegs correct" );
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for (CodeGenRegister *SubReg : Cand->ExplicitSubRegs ) {
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if (CodeGenSubRegIndex *SubRegIdx = getSubRegIndex (SubReg)) {
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- if (SubRegIdx->ConcatenationOf .empty ()) {
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+ if (SubRegIdx->ConcatenationOf .empty ())
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Parts.push_back (SubRegIdx);
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- } else
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- for (CodeGenSubRegIndex *SubIdx : SubRegIdx->ConcatenationOf )
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- Parts.push_back (SubIdx);
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+ else
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+ append_range (Parts, SubRegIdx->ConcatenationOf );
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} else {
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// Sub-register doesn't exist.
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Parts.clear ();
Original file line number Diff line number Diff line change @@ -1208,11 +1208,10 @@ void CodeGenSchedModels::collectProcItinRW() {
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// Gather the unsupported features for processor models.
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void CodeGenSchedModels::collectProcUnsupportedFeatures () {
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- for (CodeGenProcModel &ProcModel : ProcModels) {
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- for (Record *Pred : ProcModel.ModelDef ->getValueAsListOfDefs (" UnsupportedFeatures" )) {
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- ProcModel.UnsupportedFeaturesDefs .push_back (Pred);
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- }
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- }
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+ for (CodeGenProcModel &ProcModel : ProcModels)
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+ append_range (
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+ ProcModel.UnsupportedFeaturesDefs ,
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+ ProcModel.ModelDef ->getValueAsListOfDefs (" UnsupportedFeatures" ));
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}
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// / Infer new classes from existing classes. In the process, this may create new
Original file line number Diff line number Diff line change @@ -454,8 +454,7 @@ void GIMatchTreeOpcodePartitioner::repartition(
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// predicates for one instruction in the same DAG. That should be
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// impossible.
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assert (AllOpcodes && " Conflicting opcode predicates" );
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- for (const CodeGenInstruction *Expected : OpcodeP->getInstrs ())
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- OpcodesForThisPredicate.push_back (Expected);
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+ append_range (OpcodesForThisPredicate, OpcodeP->getInstrs ());
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}
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for (const CodeGenInstruction *Expected : OpcodesForThisPredicate) {
Original file line number Diff line number Diff line change @@ -5431,8 +5431,7 @@ std::vector<Matcher *> GlobalISelEmitter::optimizeRules(
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// added rules out of it and make sure to re-create the group to properly
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// re-initialize it:
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if (CurrentGroup->size () < 2 )
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- for (Matcher *M : CurrentGroup->matchers ())
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- OptRules.push_back (M);
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+ append_range (OptRules, CurrentGroup->matchers ());
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else {
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CurrentGroup->finalize ();
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OptRules.push_back (CurrentGroup.get ());
@@ -5691,8 +5690,7 @@ void GlobalISelEmitter::run(raw_ostream &OS) {
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// Emit a table containing the LLT objects needed by the matcher and an enum
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// for the matcher to reference them with.
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std::vector<LLTCodeGen> TypeObjects;
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- for (const auto &Ty : KnownTypes)
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- TypeObjects.push_back (Ty);
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+ append_range (TypeObjects, KnownTypes);
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llvm::sort (TypeObjects);
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OS << " // LLT Objects.\n "
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<< " enum {\n " ;
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