Removed sycl_use_native_fp_atomics macro

Author: dyniols

clang/lib/Frontend/InitPreprocessor.cpp

@@ -1545,10 +1545,7 @@ static void InitializePredefinedMacros(const TargetInfo &TI,
     // with TI set to the device TargetInfo.
     const llvm::Triple &Triple = TI.getTriple();
     const llvm::Triple::SubArchType SubArch = Triple.getSubArch();
-    if (Triple.isNVPTX() || Triple.isAMDGPU() ||
-        (Triple.isSPIR() && SubArch != llvm::Triple::SPIRSubArch_fpga) ||
-        Triple.isNativeCPU())
-      Builder.defineMacro("SYCL_USE_NATIVE_FP_ATOMICS");
+
     // Enable generation of USM address spaces for FPGA.
     if (SubArch == llvm::Triple::SPIRSubArch_fpga) {
       Builder.defineMacro("__ENABLE_USM_ADDR_SPACE__");

clang/test/Preprocessor/sycl-macro-target-specific.cpp

@@ -48,8 +48,6 @@
 // RUN: | FileCheck --check-prefix=CHECK-SYCL-FP-ATOMICS %s
 // RUN: %clang_cc1 %s -fsycl-is-device -triple native_cpu \
 // RUN: -E -dM | FileCheck --check-prefix=CHECK-SYCL-FP-ATOMICS %s
-// CHECK-SYCL-FP-ATOMICS: #define SYCL_USE_NATIVE_FP_ATOMICS
-// CHECK-SYCL-FP-ATOMICS-NEG-NOT: #define SYCL_USE_NATIVE_FP_ATOMICS
 
 // RUN: %clang_cc1 %s -fsycl-is-device -triple spir64_fpga-unknown-unknown -E -dM \
 // RUN: | FileCheck --check-prefix=CHECK-USM-ADDR-SPACE %s

sycl/include/sycl/atomic_ref.hpp

@@ -469,9 +469,7 @@ class atomic_ref_impl<T, SizeOfT, DefaultOrder, DefaultScope, AddressSpace,
 
   T fetch_add(T operand, memory_order order = default_read_modify_write_order,
               memory_scope scope = default_scope) const noexcept {
-// TODO: Remove the "native atomics" macro check once implemented for all
-// backends
-#if defined(__SYCL_DEVICE_ONLY__) && defined(SYCL_USE_NATIVE_FP_ATOMICS)
+#if defined(__SYCL_DEVICE_ONLY__)
     return detail::spirv::AtomicFAdd(ptr, scope, order, operand);
 #else
     auto load_order = detail::getLoadOrder(order);
@@ -492,9 +490,7 @@ class atomic_ref_impl<T, SizeOfT, DefaultOrder, DefaultScope, AddressSpace,
 
   T fetch_sub(T operand, memory_order order = default_read_modify_write_order,
               memory_scope scope = default_scope) const noexcept {
-// TODO: Remove the "native atomics" macro check once implemented for all
-// backends
-#if defined(__SYCL_DEVICE_ONLY__) && defined(SYCL_USE_NATIVE_FP_ATOMICS)
+#if defined(__SYCL_DEVICE_ONLY__)
     return detail::spirv::AtomicFAdd(ptr, scope, order, -operand);
 #else
     auto load_order = detail::getLoadOrder(order);
@@ -513,9 +509,7 @@ class atomic_ref_impl<T, SizeOfT, DefaultOrder, DefaultScope, AddressSpace,
 
   T fetch_min(T operand, memory_order order = default_read_modify_write_order,
               memory_scope scope = default_scope) const noexcept {
-// TODO: Remove the "native atomics" macro check once implemented for all
-// backends
-#if defined(__SYCL_DEVICE_ONLY__) && defined(SYCL_USE_NATIVE_FP_ATOMICS)
+#if defined(__SYCL_DEVICE_ONLY__)
     return detail::spirv::AtomicMin(ptr, scope, order, operand);
 #else
     auto load_order = detail::getLoadOrder(order);
@@ -529,9 +523,7 @@ class atomic_ref_impl<T, SizeOfT, DefaultOrder, DefaultScope, AddressSpace,
 
   T fetch_max(T operand, memory_order order = default_read_modify_write_order,
               memory_scope scope = default_scope) const noexcept {
-// TODO: Remove the "native atomics" macro check once implemented for all
-// backends
-#if defined(__SYCL_DEVICE_ONLY__) && defined(SYCL_USE_NATIVE_FP_ATOMICS)
+#if defined(__SYCL_DEVICE_ONLY__)
     return detail::spirv::AtomicMax(ptr, scope, order, operand);
 #else
     auto load_order = detail::getLoadOrder(order);