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[NFC][InstCombine] Add tests for (~x) &/| y --> ~(x |/& (~y)) fold
Iff y is free to invert, and the users of the expression can be updated, we can undo De-Morgan fold, and immediately get rid of the `not` op.
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‎llvm/test/Transforms/InstCombine/sink-not-into-another-hand-of-and.ll

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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -instcombine -S | FileCheck %s
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; Transform
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; z = (~x) & y
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; into:
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; z = ~(x | (~y))
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; iff y is free to invert and all uses of z can be freely updated.
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declare void @use1(i1)
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; Most basic positive test
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define i32 @t0(i1 %i0, i32 %v0, i32 %v1, i32 %v2, i32 %v3) {
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; CHECK-LABEL: @t0(
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; CHECK-NEXT: [[I1:%.*]] = icmp eq i32 [[V0:%.*]], [[V1:%.*]]
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; CHECK-NEXT: [[I2:%.*]] = xor i1 [[I0:%.*]], true
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; CHECK-NEXT: [[I3:%.*]] = and i1 [[I1]], [[I2]]
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; CHECK-NEXT: [[I4:%.*]] = select i1 [[I3]], i32 [[V2:%.*]], i32 [[V3:%.*]]
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; CHECK-NEXT: ret i32 [[I4]]
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;
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%i1 = icmp eq i32 %v0, %v1
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%i2 = xor i1 %i0, -1
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%i3 = and i1 %i2, %i1
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%i4 = select i1 %i3, i32 %v2, i32 %v3
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ret i32 %i4
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}
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define i32 @t1(i32 %v0, i32 %v1, i32 %v2, i32 %v3, i32 %v4, i32 %v5) {
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; CHECK-LABEL: @t1(
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; CHECK-NEXT: [[I0:%.*]] = icmp eq i32 [[V0:%.*]], [[V1:%.*]]
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; CHECK-NEXT: [[I1:%.*]] = icmp eq i32 [[V2:%.*]], [[V3:%.*]]
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; CHECK-NEXT: call void @use1(i1 [[I0]])
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; CHECK-NEXT: [[I2:%.*]] = xor i1 [[I0]], true
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; CHECK-NEXT: [[I3:%.*]] = and i1 [[I1]], [[I2]]
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; CHECK-NEXT: [[I4:%.*]] = select i1 [[I3]], i32 [[V4:%.*]], i32 [[V5:%.*]]
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; CHECK-NEXT: ret i32 [[I4]]
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;
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%i0 = icmp eq i32 %v0, %v1
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%i1 = icmp eq i32 %v2, %v3
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call void @use1(i1 %i0)
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%i2 = xor i1 %i0, -1
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%i3 = and i1 %i2, %i1
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%i4 = select i1 %i3, i32 %v4, i32 %v5
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ret i32 %i4
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}
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; All users of %i3 must be invertible
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define i1 @n2(i1 %i0, i32 %v0, i32 %v1, i32 %v2, i32 %v3) {
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; CHECK-LABEL: @n2(
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; CHECK-NEXT: [[I1:%.*]] = icmp eq i32 [[V0:%.*]], [[V1:%.*]]
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; CHECK-NEXT: [[I2:%.*]] = xor i1 [[I0:%.*]], true
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; CHECK-NEXT: [[I3:%.*]] = and i1 [[I1]], [[I2]]
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; CHECK-NEXT: ret i1 [[I3]]
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;
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%i1 = icmp eq i32 %v0, %v1
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%i2 = xor i1 %i0, -1
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%i3 = and i1 %i2, %i1
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ret i1 %i3 ; can not be inverted
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}
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; %i1 must be invertible
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define i32 @n3(i1 %i0, i32 %v0, i32 %v1, i32 %v2, i32 %v3) {
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; CHECK-LABEL: @n3(
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; CHECK-NEXT: [[I1:%.*]] = icmp eq i32 [[V0:%.*]], [[V1:%.*]]
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; CHECK-NEXT: call void @use1(i1 [[I1]])
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; CHECK-NEXT: [[I2:%.*]] = xor i1 [[I0:%.*]], true
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; CHECK-NEXT: [[I3:%.*]] = and i1 [[I1]], [[I2]]
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; CHECK-NEXT: [[I4:%.*]] = select i1 [[I3]], i32 [[V2:%.*]], i32 [[V3:%.*]]
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; CHECK-NEXT: ret i32 [[I4]]
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;
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%i1 = icmp eq i32 %v0, %v1 ; has extra uninvertible use
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call void @use1(i1 %i1) ; bad extra use
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%i2 = xor i1 %i0, -1
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%i3 = and i1 %i2, %i1
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%i4 = select i1 %i3, i32 %v2, i32 %v3
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ret i32 %i4
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}
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; FIXME: we could invert all uses of %i1 here
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define i32 @n4(i1 %i0, i32 %v0, i32 %v1, i32 %v2, i32 %v3, i32 %v4, i32 %v5, i32* %dst) {
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; CHECK-LABEL: @n4(
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; CHECK-NEXT: [[I1:%.*]] = icmp eq i32 [[V0:%.*]], [[V1:%.*]]
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; CHECK-NEXT: [[I2:%.*]] = select i1 [[I1]], i32 [[V2:%.*]], i32 [[V3:%.*]]
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; CHECK-NEXT: store i32 [[I2]], i32* [[DST:%.*]], align 4
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; CHECK-NEXT: [[I3:%.*]] = xor i1 [[I0:%.*]], true
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; CHECK-NEXT: [[I4:%.*]] = and i1 [[I1]], [[I3]]
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; CHECK-NEXT: [[I5:%.*]] = select i1 [[I4]], i32 [[V4:%.*]], i32 [[V5:%.*]]
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; CHECK-NEXT: ret i32 [[I5]]
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;
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%i1 = icmp eq i32 %v0, %v1 ; has extra invertible use
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%i2 = select i1 %i1, i32 %v2, i32 %v3 ; invertible use
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store i32 %i2, i32* %dst
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%i3 = xor i1 %i0, -1
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%i4 = and i1 %i3, %i1
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%i5 = select i1 %i4, i32 %v4, i32 %v5
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ret i32 %i5
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}

‎llvm/test/Transforms/InstCombine/sink-not-into-another-hand-of-or.ll

Lines changed: 96 additions & 0 deletions
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -instcombine -S | FileCheck %s
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; Transform
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; z = (~x) | y
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; into:
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; z = ~(x & (~y))
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; iff y is free to invert and all uses of z can be freely updated.
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declare void @use1(i1)
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; Most basic positive test
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define i32 @t0(i1 %i0, i32 %v0, i32 %v1, i32 %v2, i32 %v3) {
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; CHECK-LABEL: @t0(
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; CHECK-NEXT: [[I1:%.*]] = icmp eq i32 [[V0:%.*]], [[V1:%.*]]
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; CHECK-NEXT: [[I2:%.*]] = xor i1 [[I0:%.*]], true
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; CHECK-NEXT: [[I3:%.*]] = or i1 [[I1]], [[I2]]
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; CHECK-NEXT: [[I4:%.*]] = select i1 [[I3]], i32 [[V2:%.*]], i32 [[V3:%.*]]
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; CHECK-NEXT: ret i32 [[I4]]
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;
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%i1 = icmp eq i32 %v0, %v1
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%i2 = xor i1 %i0, -1
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%i3 = or i1 %i2, %i1
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%i4 = select i1 %i3, i32 %v2, i32 %v3
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ret i32 %i4
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}
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define i32 @t1(i32 %v0, i32 %v1, i32 %v2, i32 %v3, i32 %v4, i32 %v5) {
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; CHECK-LABEL: @t1(
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; CHECK-NEXT: [[I0:%.*]] = icmp eq i32 [[V0:%.*]], [[V1:%.*]]
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; CHECK-NEXT: [[I1:%.*]] = icmp eq i32 [[V2:%.*]], [[V3:%.*]]
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; CHECK-NEXT: call void @use1(i1 [[I0]])
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; CHECK-NEXT: [[I2:%.*]] = xor i1 [[I0]], true
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; CHECK-NEXT: [[I3:%.*]] = or i1 [[I1]], [[I2]]
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; CHECK-NEXT: [[I4:%.*]] = select i1 [[I3]], i32 [[V4:%.*]], i32 [[V5:%.*]]
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; CHECK-NEXT: ret i32 [[I4]]
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;
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%i0 = icmp eq i32 %v0, %v1
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%i1 = icmp eq i32 %v2, %v3
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call void @use1(i1 %i0)
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%i2 = xor i1 %i0, -1
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%i3 = or i1 %i2, %i1
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%i4 = select i1 %i3, i32 %v4, i32 %v5
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ret i32 %i4
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}
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; All users of %i3 must be invertible
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define i1 @n2(i1 %i0, i32 %v0, i32 %v1, i32 %v2, i32 %v3) {
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; CHECK-LABEL: @n2(
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; CHECK-NEXT: [[I1:%.*]] = icmp eq i32 [[V0:%.*]], [[V1:%.*]]
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; CHECK-NEXT: [[I2:%.*]] = xor i1 [[I0:%.*]], true
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; CHECK-NEXT: [[I3:%.*]] = or i1 [[I1]], [[I2]]
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; CHECK-NEXT: ret i1 [[I3]]
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;
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%i1 = icmp eq i32 %v0, %v1
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%i2 = xor i1 %i0, -1
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%i3 = or i1 %i2, %i1
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ret i1 %i3 ; can not be inverted
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}
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; %i1 must be invertible
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define i32 @n3(i1 %i0, i32 %v0, i32 %v1, i32 %v2, i32 %v3) {
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; CHECK-LABEL: @n3(
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; CHECK-NEXT: [[I1:%.*]] = icmp eq i32 [[V0:%.*]], [[V1:%.*]]
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; CHECK-NEXT: call void @use1(i1 [[I1]])
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; CHECK-NEXT: [[I2:%.*]] = xor i1 [[I0:%.*]], true
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; CHECK-NEXT: [[I3:%.*]] = or i1 [[I1]], [[I2]]
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; CHECK-NEXT: [[I4:%.*]] = select i1 [[I3]], i32 [[V2:%.*]], i32 [[V3:%.*]]
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; CHECK-NEXT: ret i32 [[I4]]
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;
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%i1 = icmp eq i32 %v0, %v1 ; has extra uninvertible use
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call void @use1(i1 %i1) ; bad extra use
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%i2 = xor i1 %i0, -1
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%i3 = or i1 %i2, %i1
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%i4 = select i1 %i3, i32 %v2, i32 %v3
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ret i32 %i4
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}
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; FIXME: we could invert all uses of %i1 here
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define i32 @n4(i1 %i0, i32 %v0, i32 %v1, i32 %v2, i32 %v3, i32 %v4, i32 %v5, i32* %dst) {
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; CHECK-LABEL: @n4(
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; CHECK-NEXT: [[I1:%.*]] = icmp eq i32 [[V0:%.*]], [[V1:%.*]]
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; CHECK-NEXT: [[I2:%.*]] = select i1 [[I1]], i32 [[V2:%.*]], i32 [[V3:%.*]]
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; CHECK-NEXT: store i32 [[I2]], i32* [[DST:%.*]], align 4
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; CHECK-NEXT: [[I3:%.*]] = xor i1 [[I0:%.*]], true
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; CHECK-NEXT: [[I4:%.*]] = or i1 [[I1]], [[I3]]
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; CHECK-NEXT: [[I5:%.*]] = select i1 [[I4]], i32 [[V4:%.*]], i32 [[V5:%.*]]
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; CHECK-NEXT: ret i32 [[I5]]
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;
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%i1 = icmp eq i32 %v0, %v1 ; has extra invertible use
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%i2 = select i1 %i1, i32 %v2, i32 %v3 ; invertible use
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store i32 %i2, i32* %dst
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%i3 = xor i1 %i0, -1
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%i4 = or i1 %i3, %i1
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%i5 = select i1 %i4, i32 %v4, i32 %v5
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ret i32 %i5
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}

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