[SYCL][SPIR-V] Re-land "Promote SPV_INTEL_optimization_hints to SPV_KHR_expect_assume" (#3960)

MrSidims · web-flow · commit 696ac39db3ff · 2021-10-28T18:29:39.000+03:00
This reverts commit 733c4fc. Signed-off-by: Dmitry Sidorov <dmitry.sidorov@intel.com>
diff --git a/clang/lib/Driver/ToolChains/Clang.cpp b/clang/lib/Driver/ToolChains/Clang.cpp
@@ -8819,7 +8819,8 @@ void SPIRVTranslator::ConstructJob(Compilation &C, const JobAction &JA,
     std::string ExtArg("-spirv-ext=-all");
     std::string DefaultExtArg =
         ",+SPV_EXT_shader_atomic_float_add,+SPV_EXT_shader_atomic_float_min_max"
-        ",+SPV_KHR_no_integer_wrap_decoration,+SPV_KHR_float_controls";
+        ",+SPV_KHR_no_integer_wrap_decoration,+SPV_KHR_float_controls"
+        ",+SPV_KHR_expect_assume";
     std::string INTELExtArg =
         ",+SPV_INTEL_subgroups,+SPV_INTEL_media_block_io"
         ",+SPV_INTEL_device_side_avc_motion_estimation"
@@ -8829,9 +8830,8 @@ void SPIRVTranslator::ConstructJob(Compilation &C, const JobAction &JA,
         ",+SPV_INTEL_blocking_pipes,+SPV_INTEL_function_pointers"
         ",+SPV_INTEL_kernel_attributes,+SPV_INTEL_io_pipes"
         ",+SPV_INTEL_inline_assembly,+SPV_INTEL_arbitrary_precision_integers"
-        ",+SPV_INTEL_optimization_hints,+SPV_INTEL_float_controls2"
-        ",+SPV_INTEL_vector_compute,+SPV_INTEL_fast_composite"
-        ",+SPV_INTEL_fpga_buffer_location"
+        ",+SPV_INTEL_float_controls2,+SPV_INTEL_vector_compute"
+        ",+SPV_INTEL_fast_composite,+SPV_INTEL_fpga_buffer_location"
         ",+SPV_INTEL_arbitrary_precision_fixed_point"
         ",+SPV_INTEL_arbitrary_precision_floating_point"
         ",+SPV_INTEL_arbitrary_precision_floating_point"
diff --git a/clang/test/Driver/sycl-spirv-ext.c b/clang/test/Driver/sycl-spirv-ext.c
@@ -29,6 +29,7 @@
 // CHECK-DEFAULT-SAME:,+SPV_EXT_shader_atomic_float_add
 // CHECK-DEFAULT-SAME:,+SPV_EXT_shader_atomic_float_min_max
 // CHECK-DEFAULT-SAME:,+SPV_KHR_no_integer_wrap_decoration,+SPV_KHR_float_controls
+// CHECK-DEFAULT-SAME:,+SPV_KHR_expect_assume
 // CHECK-DEFAULT-SAME:,+SPV_INTEL_subgroups,+SPV_INTEL_media_block_io
 // CHECK-DEFAULT-SAME:,+SPV_INTEL_device_side_avc_motion_estimation
 // CHECK-DEFAULT-SAME:,+SPV_INTEL_fpga_loop_controls,+SPV_INTEL_fpga_memory_attributes
@@ -37,7 +38,7 @@
 // CHECK-DEFAULT-SAME:,+SPV_INTEL_blocking_pipes,+SPV_INTEL_function_pointers
 // CHECK-DEFAULT-SAME:,+SPV_INTEL_kernel_attributes,+SPV_INTEL_io_pipes
 // CHECK-DEFAULT-SAME:,+SPV_INTEL_inline_assembly,+SPV_INTEL_arbitrary_precision_integers
-// CHECK-DEFAULT-SAME:,+SPV_INTEL_optimization_hints,+SPV_INTEL_float_controls2
+// CHECK-DEFAULT-SAME:,+SPV_INTEL_float_controls2
 // CHECK-DEFAULT-SAME:,+SPV_INTEL_vector_compute,+SPV_INTEL_fast_composite
 // CHECK-DEFAULT-SAME:,+SPV_INTEL_fpga_buffer_location
 // CHECK-DEFAULT-SAME:,+SPV_INTEL_arbitrary_precision_fixed_point
@@ -57,6 +58,7 @@
 // CHECK-FPGA-HW-SAME:,+SPV_EXT_shader_atomic_float_add
 // CHECK-FPGA-HW-SAME:,+SPV_EXT_shader_atomic_float_min_max
 // CHECK-FPGA-HW-SAME:,+SPV_KHR_no_integer_wrap_decoration,+SPV_KHR_float_controls
+// CHECK-FPGA-HW-SAME:,+SPV_KHR_expect_assume
 // CHECK-FPGA-HW-SAME:,+SPV_INTEL_subgroups,+SPV_INTEL_media_block_io
 // CHECK-FPGA-HW-SAME:,+SPV_INTEL_device_side_avc_motion_estimation
 // CHECK-FPGA-HW-SAME:,+SPV_INTEL_fpga_loop_controls,+SPV_INTEL_fpga_memory_attributes
@@ -65,8 +67,8 @@
 // CHECK-FPGA-HW-SAME:,+SPV_INTEL_blocking_pipes,+SPV_INTEL_function_pointers
 // CHECK-FPGA-HW-SAME:,+SPV_INTEL_kernel_attributes,+SPV_INTEL_io_pipes
 // CHECK-FPGA-HW-SAME:,+SPV_INTEL_inline_assembly,+SPV_INTEL_arbitrary_precision_integers
-// CHECK-FPGA-HW-SAME:,+SPV_INTEL_optimization_hints,+SPV_INTEL_float_controls2,
-// CHECK-FPGA-HW-SAME:+SPV_INTEL_vector_compute,+SPV_INTEL_fast_composite
+// CHECK-FPGA-HW-SAME:,+SPV_INTEL_float_controls2
+// CHECK-FPGA-HW-SAME:,+SPV_INTEL_vector_compute,+SPV_INTEL_fast_composite
 // CHECK-FPGA-HW-SAME:,+SPV_INTEL_fpga_buffer_location
 // CHECK-FPGA-HW-SAME:,+SPV_INTEL_arbitrary_precision_fixed_point
 // CHECK-FPGA-HW-SAME:,+SPV_INTEL_arbitrary_precision_floating_point
diff --git a/llvm-spirv/include/LLVMSPIRVExtensions.inc b/llvm-spirv/include/LLVMSPIRVExtensions.inc
@@ -9,6 +9,7 @@ EXT(SPV_KHR_float_controls)
 EXT(SPV_KHR_linkonce_odr)
 EXT(SPV_KHR_integer_dot_product)
 EXT(SPV_KHR_bit_instructions)
+EXT(SPV_KHR_expect_assume)
 EXT(SPV_INTEL_subgroups)
 EXT(SPV_INTEL_media_block_io)
 EXT(SPV_INTEL_device_side_avc_motion_estimation)
diff --git a/llvm-spirv/lib/SPIRV/SPIRVReader.cpp b/llvm-spirv/lib/SPIRV/SPIRVReader.cpp
@@ -2239,16 +2239,16 @@ Value *SPIRVToLLVM::transValueWithoutDecoration(SPIRVValue *BV, Function *F,
     return mapValue(BV, Call);
   }
 
-  case internal::OpAssumeTrueINTEL: {
+  case OpAssumeTrueKHR: {
     IRBuilder<> Builder(BB);
-    SPIRVAssumeTrueINTEL *BC = static_cast<SPIRVAssumeTrueINTEL *>(BV);
+    SPIRVAssumeTrueKHR *BC = static_cast<SPIRVAssumeTrueKHR *>(BV);
     Value *Condition = transValue(BC->getCondition(), F, BB);
     return mapValue(BV, Builder.CreateAssumption(Condition));
   }
 
-  case internal::OpExpectINTEL: {
+  case OpExpectKHR: {
     IRBuilder<> Builder(BB);
-    SPIRVExpectINTELInstBase *BC = static_cast<SPIRVExpectINTELInstBase *>(BV);
+    SPIRVExpectKHRInstBase *BC = static_cast<SPIRVExpectKHRInstBase *>(BV);
     Type *RetTy = transType(BC->getType());
     Value *Val = transValue(BC->getOperand(0), F, BB);
     Value *ExpVal = transValue(BC->getOperand(1), F, BB);
diff --git a/llvm-spirv/lib/SPIRV/SPIRVWriter.cpp b/llvm-spirv/lib/SPIRV/SPIRVWriter.cpp
@@ -2733,12 +2733,11 @@ SPIRVValue *LLVMToSPIRVBase::transIntrinsicInst(IntrinsicInst *II,
   switch (II->getIntrinsicID()) {
   case Intrinsic::assume: {
     // llvm.assume translation is currently supported only within
-    // SPV_INTEL_optimization_hints extension, ignore it otherwise, since it's
+    // SPV_KHR_expect_assume extension, ignore it otherwise, since it's
     // an optimization hint
-    if (BM->isAllowedToUseExtension(
-            ExtensionID::SPV_INTEL_optimization_hints)) {
+    if (BM->isAllowedToUseExtension(ExtensionID::SPV_KHR_expect_assume)) {
       SPIRVValue *Condition = transValue(II->getArgOperand(0), BB);
-      return BM->addAssumeTrueINTELInst(Condition, BB);
+      return BM->addAssumeTrueKHRInst(Condition, BB);
     }
     return nullptr;
   }
@@ -2849,14 +2848,13 @@ SPIRVValue *LLVMToSPIRVBase::transIntrinsicInst(IntrinsicInst *II,
   }
   case Intrinsic::expect: {
     // llvm.expect translation is currently supported only within
-    // SPV_INTEL_optimization_hints extension, replace it with a translated
-    // value of #0 operand otherwise, since it's an optimization hint
+    // SPV_KHR_expect_assume extension, replace it with a translated value of #0
+    // operand otherwise, since it's an optimization hint
     SPIRVValue *Value = transValue(II->getArgOperand(0), BB);
-    if (BM->isAllowedToUseExtension(
-            ExtensionID::SPV_INTEL_optimization_hints)) {
+    if (BM->isAllowedToUseExtension(ExtensionID::SPV_KHR_expect_assume)) {
       SPIRVType *Ty = transType(II->getType());
       SPIRVValue *ExpectedValue = transValue(II->getArgOperand(1), BB);
-      return BM->addExpectINTELInst(Ty, Value, ExpectedValue, BB);
+      return BM->addExpectKHRInst(Ty, Value, ExpectedValue, BB);
     }
     return Value;
   }
diff --git a/llvm-spirv/lib/SPIRV/libSPIRV/SPIRVInstruction.h b/llvm-spirv/lib/SPIRV/libSPIRV/SPIRVInstruction.h
@@ -2762,30 +2762,30 @@ _SPIRV_OP(GenericPtrMemSemantics, true, 4, false)
 _SPIRV_OP(GenericCastToPtrExplicit, true, 5, false, 1)
 #undef _SPIRV_OP
 
-class SPIRVAssumeTrueINTEL : public SPIRVInstruction {
+class SPIRVAssumeTrueKHR : public SPIRVInstruction {
 public:
-  static const Op OC = internal::OpAssumeTrueINTEL;
+  static const Op OC = OpAssumeTrueKHR;
   static const SPIRVWord FixedWordCount = 2;
 
-  SPIRVAssumeTrueINTEL(SPIRVId TheCondition, SPIRVBasicBlock *BB)
+  SPIRVAssumeTrueKHR(SPIRVId TheCondition, SPIRVBasicBlock *BB)
       : SPIRVInstruction(FixedWordCount, OC, BB), ConditionId(TheCondition) {
     validate();
     setHasNoId();
     setHasNoType();
     assert(BB && "Invalid BB");
   }
 
-  SPIRVAssumeTrueINTEL() : SPIRVInstruction(OC), ConditionId(SPIRVID_MAX) {
+  SPIRVAssumeTrueKHR() : SPIRVInstruction(OC), ConditionId(SPIRVID_MAX) {
     setHasNoId();
     setHasNoType();
   }
 
   SPIRVCapVec getRequiredCapability() const override {
-    return getVec(internal::CapabilityOptimizationHintsINTEL);
+    return getVec(CapabilityExpectAssumeKHR);
   }
 
   llvm::Optional<ExtensionID> getRequiredExtension() const override {
-    return ExtensionID::SPV_INTEL_optimization_hints;
+    return ExtensionID::SPV_KHR_expect_assume;
   }
 
   SPIRVValue *getCondition() const { return getValue(ConditionId); }
@@ -2799,22 +2799,21 @@ class SPIRVAssumeTrueINTEL : public SPIRVInstruction {
   SPIRVId ConditionId;
 };
 
-class SPIRVExpectINTELInstBase : public SPIRVInstTemplateBase {
+class SPIRVExpectKHRInstBase : public SPIRVInstTemplateBase {
 protected:
   SPIRVCapVec getRequiredCapability() const override {
-    return getVec(internal::CapabilityOptimizationHintsINTEL);
+    return getVec(CapabilityExpectAssumeKHR);
   }
 
   llvm::Optional<ExtensionID> getRequiredExtension() const override {
-    return ExtensionID::SPV_INTEL_optimization_hints;
+    return ExtensionID::SPV_KHR_expect_assume;
   }
 };
 
-#define _SPIRV_OP_INTERNAL(x, ...)                                             \
-  typedef SPIRVInstTemplate<SPIRVExpectINTELInstBase, internal::Op##x,         \
-                            __VA_ARGS__>                                       \
+#define _SPIRV_OP(x, ...)                                                      \
+  typedef SPIRVInstTemplate<SPIRVExpectKHRInstBase, Op##x, __VA_ARGS__>        \
       SPIRV##x;
-_SPIRV_OP_INTERNAL(ExpectINTEL, true, 5)
+_SPIRV_OP(ExpectKHR, true, 5)
 #undef _SPIRV_OP_INTERNAL
 
 class SPIRVDotKHRBase : public SPIRVInstTemplateBase {
diff --git a/llvm-spirv/lib/SPIRV/libSPIRV/SPIRVModule.cpp b/llvm-spirv/lib/SPIRV/libSPIRV/SPIRVModule.cpp
@@ -444,11 +444,6 @@ class SPIRVModuleImpl : public SPIRVModule {
                                         SPIRVBasicBlock *) override;
   SPIRVInstruction *addSampledImageInst(SPIRVType *, SPIRVValue *, SPIRVValue *,
                                         SPIRVBasicBlock *) override;
-  SPIRVInstruction *addAssumeTrueINTELInst(SPIRVValue *Condition,
-                                           SPIRVBasicBlock *BB) override;
-  SPIRVInstruction *addExpectINTELInst(SPIRVType *ResultTy, SPIRVValue *Value,
-                                       SPIRVValue *ExpectedValue,
-                                       SPIRVBasicBlock *BB) override;
   template <typename AliasingInstType>
   SPIRVEntry *getOrAddMemAliasingINTELInst(std::vector<SPIRVId> Args,
                                            llvm::MDNode *MD);
@@ -458,6 +453,11 @@ class SPIRVModuleImpl : public SPIRVModule {
                                               llvm::MDNode *MD) override;
   SPIRVEntry *getOrAddAliasScopeListDeclINTELInst(std::vector<SPIRVId> Args,
                                                   llvm::MDNode *MD) override;
+  SPIRVInstruction *addAssumeTrueKHRInst(SPIRVValue *Condition,
+                                         SPIRVBasicBlock *BB) override;
+  SPIRVInstruction *addExpectKHRInst(SPIRVType *ResultTy, SPIRVValue *Value,
+                                     SPIRVValue *ExpectedValue,
+                                     SPIRVBasicBlock *BB) override;
 
   virtual SPIRVId getExtInstSetId(SPIRVExtInstSetKind Kind) const override;
 
@@ -1607,17 +1607,17 @@ SPIRVInstruction *SPIRVModuleImpl::addSampledImageInst(SPIRVType *ResultTy,
                         BB);
 }
 
-SPIRVInstruction *SPIRVModuleImpl::addAssumeTrueINTELInst(SPIRVValue *Condition,
-                                                          SPIRVBasicBlock *BB) {
-  return addInstruction(new SPIRVAssumeTrueINTEL(Condition->getId(), BB), BB);
+SPIRVInstruction *SPIRVModuleImpl::addAssumeTrueKHRInst(SPIRVValue *Condition,
+                                                        SPIRVBasicBlock *BB) {
+  return addInstruction(new SPIRVAssumeTrueKHR(Condition->getId(), BB), BB);
 }
 
-SPIRVInstruction *SPIRVModuleImpl::addExpectINTELInst(SPIRVType *ResultTy,
-                                                      SPIRVValue *Value,
-                                                      SPIRVValue *ExpectedValue,
-                                                      SPIRVBasicBlock *BB) {
+SPIRVInstruction *SPIRVModuleImpl::addExpectKHRInst(SPIRVType *ResultTy,
+                                                    SPIRVValue *Value,
+                                                    SPIRVValue *ExpectedValue,
+                                                    SPIRVBasicBlock *BB) {
   return addInstruction(SPIRVInstTemplateBase::create(
-                            internal::OpExpectINTEL, ResultTy, getId(),
+                            OpExpectKHR, ResultTy, getId(),
                             getVec(Value->getId(), ExpectedValue->getId()), BB,
                             this),
                         BB);
diff --git a/llvm-spirv/lib/SPIRV/libSPIRV/SPIRVModule.h b/llvm-spirv/lib/SPIRV/libSPIRV/SPIRVModule.h
@@ -454,18 +454,18 @@ class SPIRVModule {
   virtual SPIRVInstruction *addSampledImageInst(SPIRVType *, SPIRVValue *,
                                                 SPIRVValue *,
                                                 SPIRVBasicBlock *) = 0;
-  virtual SPIRVInstruction *addAssumeTrueINTELInst(SPIRVValue *Condition,
-                                                   SPIRVBasicBlock *BB) = 0;
-  virtual SPIRVInstruction *addExpectINTELInst(SPIRVType *ResultTy,
-                                               SPIRVValue *Value,
-                                               SPIRVValue *ExpectedValue,
-                                               SPIRVBasicBlock *BB) = 0;
   virtual SPIRVEntry *getOrAddAliasDomainDeclINTELInst(
       std::vector<SPIRVId> Args, llvm::MDNode *MD) = 0;
   virtual SPIRVEntry *getOrAddAliasScopeDeclINTELInst(
       std::vector<SPIRVId> Args, llvm::MDNode *MD) = 0;
   virtual SPIRVEntry *getOrAddAliasScopeListDeclINTELInst(
       std::vector<SPIRVId> Args, llvm::MDNode *MD) = 0;
+  virtual SPIRVInstruction *addAssumeTrueKHRInst(SPIRVValue *Condition,
+                                                 SPIRVBasicBlock *BB) = 0;
+  virtual SPIRVInstruction *addExpectKHRInst(SPIRVType *ResultTy,
+                                             SPIRVValue *Value,
+                                             SPIRVValue *ExpectedValue,
+                                             SPIRVBasicBlock *BB) = 0;
 
   virtual SPIRVId getExtInstSetId(SPIRVExtInstSetKind Kind) const = 0;
 
diff --git a/llvm-spirv/lib/SPIRV/libSPIRV/SPIRVNameMapEnum.h b/llvm-spirv/lib/SPIRV/libSPIRV/SPIRVNameMapEnum.h
@@ -526,7 +526,7 @@ template <> inline void SPIRVMap<Capability, std::string>::init() {
   add(CapabilityAtomicFloat16MinMaxEXT, "AtomicFloat16MinMaxEXT");
   add(CapabilityVectorComputeINTEL, "VectorComputeINTEL");
   add(CapabilityVectorAnyINTEL, "VectorAnyINTEL");
-  add(internal::CapabilityOptimizationHintsINTEL, "OptimizationHintsINTEL");
+  add(CapabilityExpectAssumeKHR, "ExpectAssumeKHR");
   add(CapabilitySubgroupAvcMotionEstimationINTEL,
       "SubgroupAvcMotionEstimationINTEL");
   add(CapabilitySubgroupAvcMotionEstimationIntraINTEL,
diff --git a/llvm-spirv/lib/SPIRV/libSPIRV/SPIRVOpCodeEnum.h b/llvm-spirv/lib/SPIRV/libSPIRV/SPIRVOpCodeEnum.h
@@ -351,6 +351,8 @@ _SPIRV_OP(AsmINTEL, 5610)
 _SPIRV_OP(AsmCallINTEL, 5611)
 _SPIRV_OP(AtomicFMinEXT, 5614)
 _SPIRV_OP(AtomicFMaxEXT, 5615)
+_SPIRV_OP(AssumeTrueKHR, 5630)
+_SPIRV_OP(ExpectKHR, 5631)
 _SPIRV_OP(VmeImageINTEL, 5699)
 _SPIRV_OP(TypeVmeImageINTEL, 5700)
 _SPIRV_OP(TypeAvcImePayloadINTEL, 5701)
diff --git a/llvm-spirv/lib/SPIRV/libSPIRV/SPIRVOpCodeEnumInternal.h b/llvm-spirv/lib/SPIRV/libSPIRV/SPIRVOpCodeEnumInternal.h
@@ -1,7 +1,5 @@
 #include "spirv_internal.hpp"
 
-_SPIRV_OP_INTERNAL(AssumeTrueINTEL, internal::OpAssumeTrueINTEL)
-_SPIRV_OP_INTERNAL(ExpectINTEL, internal::OpExpectINTEL)
 _SPIRV_OP_INTERNAL(Forward, internal::OpForward)
 _SPIRV_OP_INTERNAL(AliasDomainDeclINTEL, internal::OpAliasDomainDeclINTEL)
 _SPIRV_OP_INTERNAL(AliasScopeDeclINTEL, internal::OpAliasScopeDeclINTEL)
diff --git a/llvm-spirv/lib/SPIRV/libSPIRV/spirv_internal.hpp b/llvm-spirv/lib/SPIRV/libSPIRV/spirv_internal.hpp
@@ -35,8 +35,6 @@ enum InternalLinkageType {
 };
 
 enum InternalOp {
-  IOpAssumeTrueINTEL = 5630,
-  IOpExpectINTEL = 5631,
   IOpAliasDomainDeclINTEL = 5911,
   IOpAliasScopeDeclINTEL = 5912,
   IOpAliasScopeListDeclINTEL = 5913,
@@ -66,7 +64,6 @@ enum InternalDecoration {
 };
 
 enum InternalCapability {
-  ICapOptimizationHintsINTEL = 5629,
   ICapFPGADSPControlINTEL = 5908,
   ICapMemoryAccessAliasingINTEL = 5910,
   ICapFPGAInvocationPipeliningAttributesINTEL = 5916,
@@ -107,8 +104,6 @@ _SPIRV_OP(Op, JointMatrixMadINTEL)
 #undef _SPIRV_OP
 
 constexpr Op OpForward = static_cast<Op>(IOpForward);
-constexpr Op OpAssumeTrueINTEL = static_cast<Op>(IOpAssumeTrueINTEL);
-constexpr Op OpExpectINTEL = static_cast<Op>(IOpExpectINTEL);
 constexpr Op OpAliasDomainDeclINTEL = static_cast<Op>(IOpAliasDomainDeclINTEL);
 constexpr Op OpAliasScopeDeclINTEL = static_cast<Op>(IOpAliasScopeDeclINTEL);
 constexpr Op OpAliasScopeListDeclINTEL =
@@ -137,8 +132,6 @@ constexpr Decoration DecorationFuncParamKindINTEL =
 constexpr Decoration DecorationFuncParamDescINTEL =
     static_cast<Decoration>(IDecFuncParamDescINTEL);
 
-constexpr Capability CapabilityOptimizationHintsINTEL =
-    static_cast<Capability>(ICapOptimizationHintsINTEL);
 constexpr Capability CapabilityFastCompositeINTEL =
     static_cast<Capability>(ICapFastCompositeINTEL);
 constexpr Capability CapabilityOptNoneINTEL =
diff --git a/llvm-spirv/test/llvm-intrinsics/assume.ll b/llvm-spirv/test/llvm-intrinsics/assume.ll
@@ -1,5 +1,5 @@
 ; RUN: llvm-as %s -o %t.bc
-; RUN: llvm-spirv %t.bc --spirv-ext=+SPV_INTEL_optimization_hints -o %t.spv
+; RUN: llvm-spirv %t.bc --spirv-ext=+SPV_KHR_expect_assume -o %t.spv
 ; RUN: llvm-spirv %t.spv -to-text -o %t.spt
 ; RUN: FileCheck < %t.spt %s --check-prefix=CHECK-SPIRV
 ; RUN: llvm-spirv -r %t.spv -o %t.bc
@@ -12,20 +12,20 @@
 ; RUN: llvm-spirv -r %t.spv -o %t.bc
 ; RUN: llvm-dis < %t.bc | FileCheck %s --check-prefix=CHECK-LLVM-NO-EXT
 
-; CHECK-SPIRV: Capability OptimizationHintsINTEL
-; CHECK-SPIRV: Extension "SPV_INTEL_optimization_hints"
+; CHECK-SPIRV: Capability ExpectAssumeKHR
+; CHECK-SPIRV: Extension "SPV_KHR_expect_assume"
 ; CHECK-SPIRV: Name [[COMPARE:[0-9]+]] "cmp"
 ; CHECK-SPIRV: INotEqual {{[0-9]+}} [[COMPARE]] {{[0-9]+}} {{[0-9]+}}
-; CHECK-SPIRV: AssumeTrueINTEL [[COMPARE]]
+; CHECK-SPIRV: AssumeTrueKHR [[COMPARE]]
 
 ; CHECK-LLVM: %cmp = icmp ne i32 %0, 0
 ; CHECK-LLVM: call void @llvm.assume(i1 %cmp)
 
-; CHECK-SPIRV-NO-EXT-NOT: Capability OptimizationHintsINTEL
-; CHECK-SPIRV-NO-EXT-NOT: Extension "SPV_INTEL_optimization_hints"
+; CHECK-SPIRV-NO-EXT-NOT: Capability ExpectAssumeKHR
+; CHECK-SPIRV-NO-EXT-NOT: Extension "SPV_KHR_expect_assume"
 ; CHECK-SPIRV-NO-EXT: Name [[COMPARE:[0-9]+]] "cmp"
 ; CHECK-SPIRV-NO-EXT: INotEqual {{[0-9]+}} [[COMPARE]] {{[0-9]+}} {{[0-9]+}}
-; CHECK-SPIRV-NO-EXT-NOT: AssumeTrueINTEL [[COMPARE]]
+; CHECK-SPIRV-NO-EXT-NOT: AssumeTrueKHR [[COMPARE]]
 
 ; CHECK-LLVM-NO-EXT: %cmp = icmp ne i32 %0, 0
 ; CHECK-LLVM-NO-EXT-NOT: call void @llvm.assume(i1 %cmp)
diff --git a/llvm-spirv/test/llvm-intrinsics/expect.ll b/llvm-spirv/test/llvm-intrinsics/expect.ll
