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[SYCL][Doc] Update SYCL --offload-arch option. (#15531)
Document SYCL offloading using `--offload-arch` to Intel CPUs, Intel GPUs, NVidia GPUs and AMD GPUs.
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‎sycl/doc/design/OffloadDesign.md‎

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@@ -283,7 +283,7 @@ list to be passed along.
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*Example: spir64_gen enabling options*
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> --gpu-tool-arg="-device pvc -options extraopt_pvc"
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--gpu-tool-arg="-device skl -options -extraopt_skl"
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--gpu-tool-arg="-options -extraopt_skl"
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*Example: clang-linker-wrapper options*
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@@ -296,6 +296,128 @@ resemble `--gpu-tool-arg=<arch> <arg>`. This corresponds to the existing
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option syntax of `-fsycl-targets=intel_gpu_arch` where `arch` can be a fixed
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set of targets.
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#### --offload-arch
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For SYCL offloading to Intel GPUs, Intel CPUs, NVidia and AMD GPUs, specify the device architecture using ``--offload-arch`` option. For instance
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``--offload-arch=sm_80`` to target an NVidia Tesla A100,
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``--offload-arch=gfx90a`` to target an AMD Instinct MI250X, or
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``--offload-arch=sm_80,gfx90a`` to target both.
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For Intel Graphics AOT target, valid values for ``--offload-arch`` are mapped to
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valid device names accepted by OCLOC (the Intel GPU AOT compiler) via the ``-device`` option.
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SYCL offloading with ``--offload-arch`` for Intel CPUs and Intel GPUs is currently enabled only with ``--offload-new-driver`` option.
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```
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Example:
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$ clang++ -fsycl -offload-arch=bdw --offload-new-driver -c foo.cpp // SYCL AOT for Intel GPU.
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$ clang++ -fsycl -offload-arch=broadwell --offload-new-driver -c foo.cpp // SYCL AOT for Intel CPU.
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```
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The following table shows a mapping of the accepted values for `--offload-arch` to enable SYCL offloading to Intel GPUs and the corresponding `-device` value passed to OCLOC.
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| Intel GPU device | ``--offload-arch`` accepted value | OCLOC -device value |
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|------------------|-------------------------|------------------------|
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| Intel(R) microarchitecture code name Broadwell Intel graphics architecture | bdw | bdw |
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| Intel(R) microarchitecture code name Skylake Intel graphics architecture | skl | skl |
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| Kaby Lake Intel graphics architecture | kbl | kbl |
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| Coffee Lake Intel graphics architecture | cfl | cfl |
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| Apollo Lake Intel graphics architecture | apl | apl |
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| Broxton Intel graphics architecture | bxt | apl |
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| Gemini Lake Intel graphics architecture | glk | glk |
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| Whiskey Lake Intel graphics architecture | whl | whl |
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| Amber Lake Intel graphics architecture | aml | aml |
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| Comet Lake Intel graphics architecture | cml | cml |
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| Ice Lake Intel graphics architecture | icl, icllp | icllp |
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| Elkhart Lake Intel graphics architecture | ehl | ehl |
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| Jasper Lake Intel graphics architecture | jsl | jsl |
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| Tiger Lake Intel graphics architecture | tgl, tgllp | tgllp |
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| Rocket Lake Intel graphics architecture | rkl | rkl |
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| Alder Lake S Intel graphics architecture | adl_s | adl_s |
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| Raptor Lake Intel graphics architecture | rpl_s | adl_s |
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| Alder Lake P Intel graphics architecture | adl_p | adl_p |
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| Alder Lake N Intel graphics architecture | adl_n | adl_n |
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| DG1 Intel graphics architecture | dg1 | dg1 |
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| Alchemist G10 Intel graphics architecture | acm_g10, dg2_g10 | acm_g10 |
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| Alchemist G11 Intel graphics architecture | acm_g11, dg2_g11 | acm_g11 |
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| Alchemist G12 Intel graphics architecture | acm_g12, dg2_g12 | acm_g12 |
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| Ponte Vecchio Intel graphics architecture | pvc | pvc |
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| Ponte Vecchio VG Intel graphics architecture | pvc_vg | pvc_vg |
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| Meteor Lake U/S or Arrow Lake U/S Intel graphics architecture | mtl_u, mtl_s, arl_u | mtl_s |
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| Meteor Lake H Intel graphics architecture | mtl_h | mtl_h |
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| Arrow Lake H Intel graphics architecture | arl_h | arl_h |
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| Battlemage G21 Intel graphics architecture | bmg_g21 | bmg_g21 |
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| Lunar Lake Intel graphics architecture | lnl_m | lnl_m |
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#### nvptx64-nvidia-cuda support
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For SYCL offloading to NVidia GPUs using ``--offload-arch`` option, the following table
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lists the accepted values.
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| NVidia GPU device name | ``--offload-arch`` accepted values for NVidia GPUs |
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|------------------------|----------------------------------------------------|
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| NVIDIA Maxwell architecture (compute capability 5.0) | sm_50 |
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| NVIDIA Maxwell architecture (compute capability 5.2) | sm_52 |
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| NVIDIA Maxwell architecture (compute capability 5.3) | sm_53 |
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| NVIDIA Pascal architecture (compute capability 6.0) | sm_60 |
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| NVIDIA Pascal architecture (compute capability 6.1) | sm_61 |
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| NVIDIA Pascal architecture (compute capability 6.2) | sm_62 |
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| NVIDIA Volta architecture (compute capability 7.0) | sm_70 |
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| NVIDIA Volta architecture (compute capability 7.2) | sm_72 |
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| NVIDIA Turing architecture (compute capability 7.5) | sm_75 |
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| NVIDIA Ampere architecture (compute capability 8.0) | sm_80 |
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| NVIDIA Ampere architecture (compute capability 8.6) | sm_86 |
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| NVIDIA Jetson/Drive AGX Orin architecture | sm_87 |
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| NVIDIA Ada Lovelace architecture | sm_89 |
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| NVIDIA Hopper architecture | sm_90 |
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| NVIDIA Hopper architecture (with wgmma and setmaxnreg instructions) | sm_90a |
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#### amdgcn-amd-amdhsa support
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For SYCL offloading to AMD GPUs using ``--offload-arch`` option, the following table
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lists the accepted values.
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| AMD GPU device name | ``--offload-arch`` accepted values for AMD GPUs |
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|------------------------|----------------------------------------------------|
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| AMD GCN GFX7 (Sea Islands (CI)) architecture | gfx700 |
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| AMD GCN GFX7 (Sea Islands (CI)) architecture | gfx701 |
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| AMD GCN GFX7 (Sea Islands (CI)) architecture | gfx702 |
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| AMD GCN GFX8 (Volcanic Islands (VI)) architecture | gfx801 |
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| AMD GCN GFX8 (Volcanic Islands (VI)) architecture | gfx802 |
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| AMD GCN GFX8 (Volcanic Islands (VI)) architecture | gfx803 |
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| AMD GCN GFX8 (Volcanic Islands (VI)) architecture | gfx805 |
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| AMD GCN GFX8 (Volcanic Islands (VI)) architecture | gfx810 |
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| AMD GCN GFX9 (Vega) architecture | gfx900 |
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| AMD GCN GFX9 (Vega) architecture | gfx902 |
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| AMD GCN GFX9 (Vega) architecture | gfx904 |
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| AMD GCN GFX9 (Vega) architecture | gfx906 |
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| AMD GCN GFX9 (Vega) architecture | gfx908 |
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| AMD GCN GFX9 (Vega) architecture | gfx909 |
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| AMD GCN GFX9 (Vega) architecture | gfx90a |
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| AMD GCN GFX9 (Vega) architecture | gfx90c |
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| AMD GCN GFX9 (Vega) architecture | gfx940 |
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| AMD GCN GFX9 (Vega) architecture | gfx941 |
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| AMD GCN GFX9 (Vega) architecture | gfx942 |
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| AMD GCN GFX10.1 (RDNA 1) architecture | gfx1010 |
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| AMD GCN GFX10.1 (RDNA 1) architecture | gfx1011 |
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| AMD GCN GFX10.1 (RDNA 1) architecture | gfx1012 |
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| AMD GCN GFX10.1 (RDNA 1) architecture | gfx1013 |
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| AMD GCN GFX10.3 (RDNA 2) architecture | gfx1030 |
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| GCN GFX10.3 (RDNA 2) architecture | gfx1031 |
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| GCN GFX10.3 (RDNA 2) architecture | gfx1032 |
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| GCN GFX10.3 (RDNA 2) architecture | gfx1033 |
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| GCN GFX10.3 (RDNA 2) architecture | gfx1034 |
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| GCN GFX10.3 (RDNA 2) architecture | gfx1035 |
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| GCN GFX10.3 (RDNA 2) architecture | gfx1036 |
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| GCN GFX11 (RDNA 3) architecture | gfx1100 |
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| GCN GFX11 (RDNA 3) architecture | gfx1101 |
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| GCN GFX11 (RDNA 3) architecture | gfx1102 |
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| GCN GFX11 (RDNA 3) architecture | gfx1103 |
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| GCN GFX11 (RDNA 3) architecture | gfx1150 |
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| GCN GFX11 (RDNA 3) architecture | gfx1151 |
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| GCN GFX12 (RDNA 4) architecture | gfx1200 |
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| GCN GFX12 (RDNA 4) architecture | gfx1201 |
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#### spir64_fpga support
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Compilation behaviors involving AOT for FPGA involve an additional call to
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`-Xsycl-target-backend=spir64_x86_64 <opts>` command will be processed by a new
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option to the wrapper, `--cpu-tool-arg=<arg>`
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Similar to SYCL offloading to Intel GPUs using `--offload-arch`, SYCL AOT for Intel CPUs
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will also leverage the `--offload-arch` option.
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The valid CPU device names accepted for `--offload-arch` are CPU names from ``clang -march``.
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These names are more verbose, and do not overlap with the Intel GPU names.
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These user input CPU names are mapped to the corresponding ``opencl-aot -march`` option.
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The following table shows a mapping of the accepted values for `--offload-arch` to enable SYCL offloading to Intel CPUs and the corresponding `-march` value passed to opencl-aot.
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| Intel CPU device | ``--offload-arch`` accepted value | opencl-aot -march value |
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|----------------|-------------------------|----------------------------|
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| Intel(R) Advanced Vector Extensions 512 | skylake-avx512 | avx512 |
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| Intel(R) Advanced Vector Extensions 2 | core-avx2 | avx2 |
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| Intel(R) Advanced Vector Extensions | corei7-avx | avx |
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| Intel(R) Streaming SIMD Extensions 4.2 | corei7 | sse4.2 |
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| Intel(R) microarchitecture code name Westmere | westmere | wsm |
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| Intel(R) microarchitecture code name Sandy Bridge | sandybridge | snb |
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| Intel(R) microarchitecture code name Ivy Bridge | ivybridge | ivyb |
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| Intel(R) microarchitecture code name Broadwell | broadwell | bdw |
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| Intel(R) microarchitecture code name Coffee Lake | coffeelake | cfl |
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| Intel(R) microarchitecture code name Alder Lake | alderlake | adl |
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| Intel(R) microarchitecture code name Skylake (client) | skylake | skylake |
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| Intel(R) microarchitecture code name Skylake (server) | skx | skx |
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| Intel(R) microarchitecture code name Cascade Lake | cascadelake | clk |
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| Intel(R) microarchitecture code name Ice Lake (client) | icelake-client | icl |
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| Intel(R) microarchitecture code name Ice Lake (server) | icelake-server | icx |
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| Intel(R) microarchitecture code name Sapphire Rapids | sapphirerapids | spr |
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| Intel(R) microarchitecture code name Granite Rapids | graniterapids | gnr |
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### Wrapping of device image
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Once the device binary is pulled out of the fat binary, the binary must be

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