Merge branch 'temp_no_handler_scheduler_bypass_test' into temp_no_handler_enable_no_cgh_submit

Author: slawekptak

.github/workflows/sycl-check-ready-to-merge-prs.yml

@@ -0,0 +1,54 @@
+# This workflow checks for ready-to-merge PRs - if a PR is open, not a draft,
+# passed all checks, and has been approved, it will ping @intel/llvm-gatekeepers
+# if this group has not already been mentioned or if the last mention was more
+# than $days days ago.
+
+name: Check ready-to-merge PRs
+
+on:
+  schedule:
+    - cron: '0 * * * *' # every hour
+  workflow_dispatch:
+
+permissions: read-all
+
+jobs:
+  notify-ready-prs:
+    permissions:
+      pull-requests: write
+    runs-on: ubuntu-latest
+    steps:
+      - name: Check
+        env:
+          GH_TOKEN: ${{ secrets.GITHUB_TOKEN }}
+        run: |
+          # Number of days before repeating the gatekeepers ping
+          days=3
+          days_in_seconds=$((days*24*60*60))
+
+          # Function to ping gatekeepers and print debug info
+          ping_gatekeepers() {
+            pr_number=$1
+            gh pr comment "$pr_number" --repo intel/llvm --body "@intel/llvm-gatekeepers please consider merging"
+            echo "Pinged @intel/llvm-gatekeepers for https://github.com/intel/llvm/pull/$pr_number"
+          }
+
+          # Get the list of suitable PRs
+          prs=$(gh pr list --search "is:open review:approved draft:no status:success" --repo intel/llvm --json number --jq '.[].number')
+          now=$(date -u +%s)
+          for pr in $prs; do
+            # Get the timestamp of the latest comment mentioning @intel/llvm-gatekeepers
+            latest_ts=$(gh pr view $pr --repo intel/llvm --json comments \
+              --jq '[.comments[] | select(.body | test("@intel/llvm-gatekeepers")) | .createdAt] | last')
+            # If there is no previous mention, ping the gatekeepers
+            if [[ -z "$latest_ts" ]]; then
+              ping_gatekeepers "$pr"
+            # If the latest mention is older than $days, ping the gatekeepers again
+            else
+              comment_time=$(date -u -d "$latest_ts" +%s)
+              age=$((now - comment_time))
+              if (( age >= days_in_seconds )); then
+                ping_gatekeepers "$pr"
+              fi
+            fi
+          done

.github/workflows/sycl-docs.yml

@@ -10,13 +10,24 @@ on:
     - '.github/workflows/sycl-docs.yml'
     - 'clang/docs/**'
     - 'sycl/doc/**'
+    - 'devops/benchmarks/scripts/html/**'
   push:
     branches:
     - sycl
     paths:
     - '.github/workflows/sycl-docs.yml'
     - 'clang/docs/**'
     - 'sycl/doc/**'
+    - 'devops/benchmarks/scripts/html/**'
+  workflow_dispatch:
+    inputs:
+      update_gh_pages:
+        type: choice
+        description: Update Github Pages
+        options:
+          - true
+          - false
+        default: true
 
 permissions:
   contents: read
@@ -62,5 +73,5 @@ jobs:
       with:
         path: ./install_docs
     - name: Deploy to GitHub Pages
-      if: ${{ github.event_name == 'push' }}
+      if: ${{ github.event_name == 'push' || inputs.update_gh_pages == 'true' }}
       uses: actions/deploy-pages@v4

.github/workflows/sycl-linux-build.yml

@@ -202,8 +202,7 @@ jobs:
           --ci-defaults ${{ inputs.build_configure_extra_args }} \
           -DCMAKE_C_COMPILER_LAUNCHER=ccache \
           -DCMAKE_CXX_COMPILER_LAUNCHER=ccache \
-          -DLLVM_INSTALL_UTILS=ON \
-          -DNATIVECPU_USE_OCK=Off
+          -DLLVM_INSTALL_UTILS=ON
     - name: Compile
       id: build
       # Emulate default value for manual dispatch as we've run out of available arguments.

.github/workflows/sycl-nightly.yml

@@ -201,11 +201,23 @@ jobs:
       always()
       && !cancelled()
       && needs.build-win.outputs.build_conclusion == 'success'
+    strategy:
+      fail-fast: false
+      matrix:
+        include:
+          - name: Intel L0 Gen12 GPU
+            runner: '["Windows", "gen12"]'
+            target_devices: level_zero:gpu
+
+          - name: Intel L0 Battlemage GPU
+            runner: '["Windows", "bmg"]'
+            target_devices: level_zero:gpu
+
     uses: ./.github/workflows/sycl-windows-run-tests.yml
     with:
-      name: Intel GEN12 Graphics with Level Zero
-      runner: '["Windows","gen12"]'
-      target_devices: level_zero:gpu
+      name: ${{ matrix.name }}
+      runner: ${{ matrix.runner }}
+      target_devices: ${{ matrix.target_devices }}
       toolchain_artifact_filename: ${{ needs.build-win.outputs.toolchain_artifact_filename }}
 
   cuda-aws-start:
@@ -320,20 +332,30 @@ jobs:
       toolchain_artifact_filename: ${{ needs.build-win.outputs.toolchain_artifact_filename }}
       sycl_cts_artifact: sycl_cts_bin_win
 
+  # Verification example:
+  # cosign-windows-amd64.exe verify-blob sycl_linux.tar.gz \
+  # --bundle sycl_linux.tar.gz.sigstore.json \
+  # --certificate-oidc-issuer https://token.actions.githubusercontent.com \
+  # --certificate-identity https://github.com/intel/llvm/.github/workflows/sycl-nightly.yml@refs/heads/sycl
   nightly_build_upload:
     name: Nightly Build Upload
     if: ${{ github.ref_name == 'sycl' }}
     needs: [ubuntu2204_build, build-win]
     runs-on: ubuntu-latest
     permissions:
       contents: write
+      id-token: write
     steps:
     - uses: actions/download-artifact@v4
       with:
         name: sycl_linux_default
     - uses: actions/download-artifact@v4
       with:
         name: sycl_windows_default
+    - name: Sign with sigstore/cosign
+      uses: sigstore/[email protected]
+      with:
+        inputs: sycl_linux.tar.gz sycl_windows.tar.gz
     - name: Compute tag
       id: tag
       run: |
@@ -349,6 +371,8 @@ jobs:
         files: |
           sycl_linux.tar.gz
           sycl_windows.tar.gz
+          sycl_linux.tar.gz.sigstore.json
+          sycl_windows.tar.gz.sigstore.json
         tag_name: nightly-${{ steps.tag.outputs.TAG }}
         name: DPC++ daily ${{ steps.tag.outputs.TAG }}
         prerelease: true

buildbot/configure.py

@@ -82,6 +82,11 @@ def do_configure(args, passthrough_args):
     if libclc_enabled:
         llvm_enable_projects += ";libclc"
 
+    # DeviceRTL uses -fuse-ld=lld, so enable lld.
+    if args.offload:
+        llvm_enable_projects += ";lld"
+        sycl_enabled_backends.append("offload")
+
     if args.cuda:
         llvm_targets_to_build += ";NVPTX"
         libclc_targets_to_build = libclc_nvidia_target_names
@@ -210,6 +215,12 @@ def do_configure(args, passthrough_args):
         "-DSYCL_ENABLE_MAJOR_RELEASE_PREVIEW_LIB={}".format(sycl_preview_lib),
         "-DBUG_REPORT_URL=https://github.com/intel/llvm/issues",
     ]
+    if args.offload:
+        cmake_cmd.extend(
+            [
+                "-DUR_BUILD_ADAPTER_OFFLOAD=ON",
+            ]
+        )
 
     if libclc_enabled:
         cmake_cmd.extend(
@@ -340,6 +351,11 @@ def main():
         default="AMD",
         help="choose hardware platform for HIP backend",
     )
+    parser.add_argument(
+        "--offload",
+        action="store_true",
+        help="Enable UR liboffload adapter (experimental)",
+    )
     parser.add_argument(
         "--level_zero_adapter_version",
         type=str,

clang/lib/Driver/ToolChains/SYCL.cpp

@@ -13,6 +13,7 @@
 #include "llvm/SYCLLowerIR/DeviceConfigFile.hpp"
 #include "llvm/Support/CommandLine.h"
 #include "llvm/Support/Path.h"
+#include "llvm/Support/VirtualFileSystem.h"
 #include <sstream>
 
 using namespace clang::driver;
@@ -55,7 +56,7 @@ const char *SYCLInstallationDetector::findLibspirvPath(
 
   // If -fsycl-libspirv-path= is specified, try to use that path directly.
   if (Arg *A = Args.getLastArg(options::OPT_fsycl_libspirv_path_EQ)) {
-    if (llvm::sys::fs::exists(A->getValue()))
+    if (D.getVFS().exists(A->getValue()))
       return A->getValue();
 
     return nullptr;
@@ -68,8 +69,7 @@ const char *SYCLInstallationDetector::findLibspirvPath(
     SmallString<128> LibraryPath(Path);
     llvm::sys::path::append(LibraryPath, a, b, c, Basename);
 
-    if (Args.hasArgNoClaim(options::OPT__HASH_HASH_HASH) ||
-        llvm::sys::fs::exists(LibraryPath))
+    if (D.getVFS().exists(LibraryPath))
       return Args.MakeArgString(LibraryPath);
 
     return nullptr;
@@ -249,7 +249,8 @@ static bool selectBfloatLibs(const llvm::Triple &Triple, const Compilation &C,
   static llvm::SmallSet<StringRef, 8> GPUArchsWithNBF16{
       "intel_gpu_pvc",     "intel_gpu_acm_g10", "intel_gpu_acm_g11",
       "intel_gpu_acm_g12", "intel_gpu_dg2_g10", "intel_gpu_dg2_g11",
-      "intel_dg2_g12",     "intel_gpu_bmg_g21", "intel_gpu_lnl_m"};
+      "intel_dg2_g12",     "intel_gpu_bmg_g21", "intel_gpu_lnl_m",
+      "intel_gpu_ptl_h",   "intel_gpu_ptl_u"};
   const llvm::opt::ArgList &Args = C.getArgs();
   bool NeedLibs = false;
 
@@ -291,7 +292,7 @@ static bool selectBfloatLibs(const llvm::Triple &Triple, const Compilation &C,
     auto checkBF = [](StringRef Device) {
       return Device.starts_with("pvc") || Device.starts_with("ats") ||
              Device.starts_with("dg2") || Device.starts_with("bmg") ||
-             Device.starts_with("lnl");
+             Device.starts_with("lnl") || Device.starts_with("ptl");
     };
 
     auto checkSpirvJIT = [](StringRef Target) {

clang/lib/Frontend/InitPreprocessor.cpp

@@ -1545,10 +1545,7 @@ static void InitializePredefinedMacros(const TargetInfo &TI,
     // with TI set to the device TargetInfo.
     const llvm::Triple &Triple = TI.getTriple();
     const llvm::Triple::SubArchType SubArch = Triple.getSubArch();
-    if (Triple.isNVPTX() || Triple.isAMDGPU() ||
-        (Triple.isSPIR() && SubArch != llvm::Triple::SPIRSubArch_fpga) ||
-        Triple.isNativeCPU())
-      Builder.defineMacro("SYCL_USE_NATIVE_FP_ATOMICS");
+
     // Enable generation of USM address spaces for FPGA.
     if (SubArch == llvm::Triple::SPIRSubArch_fpga) {
       Builder.defineMacro("__ENABLE_USM_ADDR_SPACE__");