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[llvm-readobj] [ARMWinEH] Clearly print an invalid case of packed unwind info as such
As the actual windows unwinder doesn't support this case, don't pretend that it is supported when dumping the generated unwind info either, even if it would be possible to interpret it as something sensible. This should reduce the risk of us emitting such a case in code (although it's unlikely as long as the unwind info is generated through the SEH opcodes, as the opcodes can't describe this case). Differential Revision: https://reviews.llvm.org/D91529
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llvm/test/tools/llvm-readobj/COFF/arm64-packed-unwind.s

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -139,7 +139,7 @@
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// CHECK-NEXT: FrameSize: 32
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// CHECK-NEXT: Prologue [
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// CHECK-NEXT: sub sp, sp, #16
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// CHECK-NEXT: stp x19, lr, [sp, #-16]!
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// CHECK-NEXT: INVALID!
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// CHECK-NEXT: end
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// CHECK-NEXT: ]
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// CHECK-NEXT: }

llvm/tools/llvm-readobj/ARMWinEHPrinter.cpp

Lines changed: 6 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1223,10 +1223,12 @@ bool Decoder::dumpPackedARM64Entry(const object::COFFObjectFile &COFF,
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if (I == (RF.RegI() + 1) / 2 - 1 && RF.RegI() % 2 == 1) {
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// The last register, an odd register without a pair
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if (RF.CR() == 1) {
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if (I == 0) // If this is the only register pair
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SW.startLine() << format("stp x%d, lr, [sp, #-%d]!\n", 19 + 2 * I,
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SavSZ);
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else
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if (I == 0) { // If this is the only register pair
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// CR=1 combined with RegI=1 doesn't map to a documented case;
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// it doesn't map to any regular unwind info opcode, and the
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// actual unwinder doesn't support it.
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SW.startLine() << "INVALID!\n";
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} else
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SW.startLine() << format("stp x%d, lr, [sp, #%d]\n", 19 + 2 * I,
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16 * I);
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} else {

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