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RKSimonRKSimon
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[X86] Add basic test coverage for Issue #58630
If we have sufficient sign bits, we should be able to expand the IMINMAX using only the lower half (and then sign-extend the result to the upper half)
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‎llvm/test/CodeGen/X86/smax.ll

Lines changed: 161 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -654,3 +654,164 @@ define <16 x i8> @test_v16i8(<16 x i8> %a, <16 x i8> %b) nounwind {
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%r = call <16 x i8> @llvm.smax.v16i8(<16 x i8> %a, <16 x i8> %b)
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ret <16 x i8> %r
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}
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define i16 @test_signbits_i16(i16 %a, i16 %b) nounwind {
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; X64-LABEL: test_signbits_i16:
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; X64: # %bb.0:
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; X64-NEXT: movswl %si, %eax
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; X64-NEXT: movswl %di, %ecx
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; X64-NEXT: sarl $15, %ecx
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; X64-NEXT: sarl $8, %eax
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; X64-NEXT: cmpw %ax, %cx
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; X64-NEXT: cmovgl %ecx, %eax
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; X64-NEXT: # kill: def $ax killed $ax killed $eax
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; X64-NEXT: retq
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;
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; X86-LABEL: test_signbits_i16:
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; X86: # %bb.0:
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; X86-NEXT: movsbl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: movswl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: sarl $15, %eax
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; X86-NEXT: cmpw %cx, %ax
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; X86-NEXT: cmovlel %ecx, %eax
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; X86-NEXT: # kill: def $ax killed $ax killed $eax
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; X86-NEXT: retl
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%ax = ashr i16 %a, 15
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%bx = ashr i16 %b, 8
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%r = call i16 @llvm.smax.i16(i16 %ax, i16 %bx)
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ret i16 %r
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}
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define i32 @test_signbits_i32(i32 %a, i32 %b) nounwind {
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; X64-LABEL: test_signbits_i32:
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; X64: # %bb.0:
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; X64-NEXT: movl %esi, %eax
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; X64-NEXT: sarl $16, %edi
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; X64-NEXT: sarl $17, %eax
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; X64-NEXT: cmpl %eax, %edi
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; X64-NEXT: cmovgl %edi, %eax
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; X64-NEXT: retq
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;
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; X86-LABEL: test_signbits_i32:
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; X86: # %bb.0:
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; X86-NEXT: movswl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: sarl $17, %eax
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; X86-NEXT: cmpl %eax, %ecx
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; X86-NEXT: cmovgl %ecx, %eax
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; X86-NEXT: retl
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%ax = ashr i32 %a, 16
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%bx = ashr i32 %b, 17
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%r = call i32 @llvm.smax.i32(i32 %ax, i32 %bx)
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ret i32 %r
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}
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define i64 @test_signbits_i64(i64 %a, i64 %b) nounwind {
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; X64-LABEL: test_signbits_i64:
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; X64: # %bb.0:
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; X64-NEXT: movq %rsi, %rax
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; X64-NEXT: sarq $32, %rdi
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; X64-NEXT: sarq $32, %rax
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; X64-NEXT: cmpq %rax, %rdi
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; X64-NEXT: cmovgq %rdi, %rax
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; X64-NEXT: retq
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;
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; X86-LABEL: test_signbits_i64:
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; X86: # %bb.0:
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; X86-NEXT: pushl %edi
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; X86-NEXT: pushl %esi
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: movl %ecx, %esi
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; X86-NEXT: sarl $31, %esi
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; X86-NEXT: movl %eax, %edx
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; X86-NEXT: sarl $31, %edx
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; X86-NEXT: cmpl %eax, %ecx
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; X86-NEXT: movl %eax, %edi
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; X86-NEXT: cmoval %ecx, %edi
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; X86-NEXT: cmpl %edx, %esi
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; X86-NEXT: cmovgl %ecx, %eax
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; X86-NEXT: cmovel %edi, %eax
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; X86-NEXT: cmovgl %esi, %edx
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; X86-NEXT: popl %esi
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; X86-NEXT: popl %edi
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; X86-NEXT: retl
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%ax = ashr i64 %a, 32
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%bx = ashr i64 %b, 32
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%r = call i64 @llvm.smax.i64(i64 %ax, i64 %bx)
742+
ret i64 %r
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}
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define i128 @test_signbits_i128(i128 %a, i128 %b) nounwind {
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; X64-LABEL: test_signbits_i128:
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; X64: # %bb.0:
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; X64-NEXT: movq %rsi, %rdi
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; X64-NEXT: sarq $63, %rdi
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; X64-NEXT: movq %rcx, %rdx
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; X64-NEXT: sarq $63, %rdx
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; X64-NEXT: sarq $28, %rcx
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; X64-NEXT: cmpq %rcx, %rsi
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; X64-NEXT: movq %rcx, %rax
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; X64-NEXT: cmovaq %rsi, %rax
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; X64-NEXT: cmpq %rdx, %rdi
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; X64-NEXT: cmovgq %rsi, %rcx
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; X64-NEXT: cmovneq %rcx, %rax
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; X64-NEXT: cmovgq %rdi, %rdx
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; X64-NEXT: retq
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;
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; X86-LABEL: test_signbits_i128:
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; X86: # %bb.0:
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; X86-NEXT: pushl %ebp
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; X86-NEXT: pushl %ebx
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; X86-NEXT: pushl %edi
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; X86-NEXT: pushl %esi
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ebp
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ebx
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; X86-NEXT: sarl $31, %ebx
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; X86-NEXT: movl %eax, %edx
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; X86-NEXT: shrdl $28, %eax, %ecx
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; X86-NEXT: sarl $31, %eax
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; X86-NEXT: sarl $28, %edx
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; X86-NEXT: cmpl %ecx, %ebp
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; X86-NEXT: movl %ecx, %edi
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; X86-NEXT: cmoval %ebp, %edi
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; X86-NEXT: movl %ebp, %esi
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; X86-NEXT: cmpl %edx, {{[0-9]+}}(%esp)
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; X86-NEXT: movl %ecx, %ebp
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; X86-NEXT: cmoval %esi, %ebp
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; X86-NEXT: cmovel %edi, %ebp
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; X86-NEXT: movl %edx, %edi
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; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
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; X86-NEXT: cmoval %esi, %edi
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; X86-NEXT: cmpl %ebx, %eax
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; X86-NEXT: movl %eax, %esi
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; X86-NEXT: sbbl %ebx, %esi
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; X86-NEXT: cmovll {{[0-9]+}}(%esp), %edx
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; X86-NEXT: cmovll {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: movl %ebx, %esi
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; X86-NEXT: xorl %eax, %esi
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; X86-NEXT: cmovel %ebp, %ecx
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; X86-NEXT: cmovel %edi, %edx
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; X86-NEXT: cmpl %eax, %ebx
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; X86-NEXT: movl %eax, %edi
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; X86-NEXT: cmoval %ebx, %edi
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; X86-NEXT: cmovgl %ebx, %eax
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; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
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; X86-NEXT: cmovnel %eax, %edi
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; X86-NEXT: movl %eax, 12(%esi)
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; X86-NEXT: movl %edi, 8(%esi)
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; X86-NEXT: movl %edx, 4(%esi)
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; X86-NEXT: movl %ecx, (%esi)
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; X86-NEXT: movl %esi, %eax
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; X86-NEXT: popl %esi
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; X86-NEXT: popl %edi
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; X86-NEXT: popl %ebx
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; X86-NEXT: popl %ebp
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; X86-NEXT: retl $4
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%ax = ashr i128 %a, 64
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%bx = ashr i128 %b, 92
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%r = call i128 @llvm.smax.i128(i128 %ax, i128 %bx)
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ret i128 %r
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}

‎llvm/test/CodeGen/X86/smin.ll

Lines changed: 165 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -653,3 +653,168 @@ define <16 x i8> @test_v16i8(<16 x i8> %a, <16 x i8> %b) nounwind {
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%r = call <16 x i8> @llvm.smin.v16i8(<16 x i8> %a, <16 x i8> %b)
654654
ret <16 x i8> %r
655655
}
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define i16 @test_signbits_i16(i16 %a, i16 %b) nounwind {
658+
; X64-LABEL: test_signbits_i16:
659+
; X64: # %bb.0:
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; X64-NEXT: movswl %si, %eax
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; X64-NEXT: movswl %di, %ecx
662+
; X64-NEXT: sarl $15, %ecx
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; X64-NEXT: sarl $8, %eax
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; X64-NEXT: cmpw %ax, %cx
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; X64-NEXT: cmovll %ecx, %eax
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; X64-NEXT: # kill: def $ax killed $ax killed $eax
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; X64-NEXT: retq
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;
669+
; X86-LABEL: test_signbits_i16:
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; X86: # %bb.0:
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; X86-NEXT: movsbl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: movswl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: sarl $15, %eax
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; X86-NEXT: cmpw %cx, %ax
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; X86-NEXT: cmovgel %ecx, %eax
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; X86-NEXT: # kill: def $ax killed $ax killed $eax
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; X86-NEXT: retl
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%ax = ashr i16 %a, 15
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%bx = ashr i16 %b, 8
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%r = call i16 @llvm.smin.i16(i16 %ax, i16 %bx)
681+
ret i16 %r
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}
683+
684+
define i32 @test_signbits_i32(i32 %a, i32 %b) nounwind {
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; X64-LABEL: test_signbits_i32:
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; X64: # %bb.0:
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; X64-NEXT: movl %esi, %eax
688+
; X64-NEXT: sarl $16, %edi
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; X64-NEXT: sarl $17, %eax
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; X64-NEXT: cmpl %eax, %edi
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; X64-NEXT: cmovll %edi, %eax
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; X64-NEXT: retq
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;
694+
; X86-LABEL: test_signbits_i32:
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; X86: # %bb.0:
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; X86-NEXT: movswl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: sarl $17, %eax
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; X86-NEXT: cmpl %eax, %ecx
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; X86-NEXT: cmovll %ecx, %eax
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; X86-NEXT: retl
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%ax = ashr i32 %a, 16
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%bx = ashr i32 %b, 17
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%r = call i32 @llvm.smin.i32(i32 %ax, i32 %bx)
705+
ret i32 %r
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}
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708+
define i64 @test_signbits_i64(i64 %a, i64 %b) nounwind {
709+
; X64-LABEL: test_signbits_i64:
710+
; X64: # %bb.0:
711+
; X64-NEXT: movq %rsi, %rax
712+
; X64-NEXT: sarq $32, %rdi
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; X64-NEXT: sarq $32, %rax
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; X64-NEXT: cmpq %rax, %rdi
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; X64-NEXT: cmovlq %rdi, %rax
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; X64-NEXT: retq
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;
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; X86-LABEL: test_signbits_i64:
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; X86: # %bb.0:
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; X86-NEXT: pushl %edi
721+
; X86-NEXT: pushl %esi
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
723+
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: movl %ecx, %esi
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; X86-NEXT: sarl $31, %esi
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; X86-NEXT: movl %eax, %edx
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; X86-NEXT: sarl $31, %edx
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; X86-NEXT: cmpl %eax, %ecx
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; X86-NEXT: movl %eax, %edi
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; X86-NEXT: cmovbl %ecx, %edi
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; X86-NEXT: cmpl %edx, %esi
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; X86-NEXT: cmovll %ecx, %eax
733+
; X86-NEXT: cmovel %edi, %eax
734+
; X86-NEXT: cmovll %esi, %edx
735+
; X86-NEXT: popl %esi
736+
; X86-NEXT: popl %edi
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; X86-NEXT: retl
738+
%ax = ashr i64 %a, 32
739+
%bx = ashr i64 %b, 32
740+
%r = call i64 @llvm.smin.i64(i64 %ax, i64 %bx)
741+
ret i64 %r
742+
}
743+
744+
define i128 @test_signbits_i128(i128 %a, i128 %b) nounwind {
745+
; X64-LABEL: test_signbits_i128:
746+
; X64: # %bb.0:
747+
; X64-NEXT: movq %rsi, %rdi
748+
; X64-NEXT: sarq $63, %rdi
749+
; X64-NEXT: movq %rcx, %rdx
750+
; X64-NEXT: sarq $63, %rdx
751+
; X64-NEXT: sarq $28, %rcx
752+
; X64-NEXT: cmpq %rcx, %rsi
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; X64-NEXT: movq %rcx, %rax
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; X64-NEXT: cmovbq %rsi, %rax
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; X64-NEXT: cmpq %rdx, %rdi
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; X64-NEXT: cmovlq %rsi, %rcx
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; X64-NEXT: cmovneq %rcx, %rax
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; X64-NEXT: cmovlq %rdi, %rdx
759+
; X64-NEXT: retq
760+
;
761+
; X86-LABEL: test_signbits_i128:
762+
; X86: # %bb.0:
763+
; X86-NEXT: pushl %ebp
764+
; X86-NEXT: pushl %ebx
765+
; X86-NEXT: pushl %edi
766+
; X86-NEXT: pushl %esi
767+
; X86-NEXT: subl $8, %esp
768+
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
769+
; X86-NEXT: movl {{[0-9]+}}(%esp), %ebx
770+
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
771+
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
772+
; X86-NEXT: movl %edx, %eax
773+
; X86-NEXT: movl %edx, %ebp
774+
; X86-NEXT: sarl $31, %eax
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; X86-NEXT: movl %ebx, %edx
776+
; X86-NEXT: shrdl $28, %ebx, %ecx
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; X86-NEXT: sarl $31, %ebx
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; X86-NEXT: sarl $28, %edx
779+
; X86-NEXT: cmpl %ecx, %edi
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; X86-NEXT: movl %ecx, %esi
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; X86-NEXT: cmovbl %edi, %esi
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; X86-NEXT: cmpl %edx, %ebp
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; X86-NEXT: movl %ecx, %ebp
784+
; X86-NEXT: cmovbl %edi, %ebp
785+
; X86-NEXT: cmovel %esi, %ebp
786+
; X86-NEXT: movl %edx, %esi
787+
; X86-NEXT: cmovbl {{[0-9]+}}(%esp), %esi
788+
; X86-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
789+
; X86-NEXT: cmpl %ebx, %eax
790+
; X86-NEXT: movl %ebx, %edi
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; X86-NEXT: cmovbl %eax, %edi
792+
; X86-NEXT: movl %ebx, %esi
793+
; X86-NEXT: cmovll %eax, %esi
794+
; X86-NEXT: movl %esi, (%esp) # 4-byte Spill
795+
; X86-NEXT: cmovnel %esi, %edi
796+
; X86-NEXT: movl %eax, %esi
797+
; X86-NEXT: sbbl %ebx, %esi
798+
; X86-NEXT: cmovll {{[0-9]+}}(%esp), %edx
799+
; X86-NEXT: cmovll {{[0-9]+}}(%esp), %ecx
800+
; X86-NEXT: xorl %eax, %ebx
801+
; X86-NEXT: cmovel %ebp, %ecx
802+
; X86-NEXT: cmovel {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
803+
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
804+
; X86-NEXT: movl (%esp), %eax # 4-byte Reload
805+
; X86-NEXT: movl %eax, 12(%esi)
806+
; X86-NEXT: movl %edi, 8(%esi)
807+
; X86-NEXT: movl %edx, 4(%esi)
808+
; X86-NEXT: movl %ecx, (%esi)
809+
; X86-NEXT: movl %esi, %eax
810+
; X86-NEXT: addl $8, %esp
811+
; X86-NEXT: popl %esi
812+
; X86-NEXT: popl %edi
813+
; X86-NEXT: popl %ebx
814+
; X86-NEXT: popl %ebp
815+
; X86-NEXT: retl $4
816+
%ax = ashr i128 %a, 64
817+
%bx = ashr i128 %b, 92
818+
%r = call i128 @llvm.smin.i128(i128 %ax, i128 %bx)
819+
ret i128 %r
820+
}

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