[llvm] Remove redundant return and continue statements (NFC)

kazutakahirata · kazutakahirata · commit 7dc3575ef2dc · 2021-01-14T20:30:34.000-08:00
Identified with readability-redundant-control-flow.
diff --git a/llvm/include/llvm/CodeGen/LiveRegUnits.h b/llvm/include/llvm/CodeGen/LiveRegUnits.h
@@ -67,7 +67,6 @@ class LiveRegUnits {
         UsedRegUnits.addReg(Reg);
       }
     }
-    return;
   }
 
   /// Initialize and clear the set.
diff --git a/llvm/lib/CodeGen/MachinePipeliner.cpp b/llvm/lib/CodeGen/MachinePipeliner.cpp
@@ -1751,7 +1751,6 @@ void SwingSchedulerDAG::checkNodeSets(NodeSetType &NodeSets) {
   }
   NodeSets.clear();
   LLVM_DEBUG(dbgs() << "Clear recurrence node-sets\n");
-  return;
 }
 
 /// Add the nodes that do not belong to a recurrence set into groups
diff --git a/llvm/lib/Demangle/MicrosoftDemangleNodes.cpp b/llvm/lib/Demangle/MicrosoftDemangleNodes.cpp
@@ -649,5 +649,4 @@ void SpecialTableSymbolNode::output(OutputStream &OS, OutputFlags Flags) const {
     TargetName->output(OS, Flags);
     OS << "'}";
   }
-  return;
 }
diff --git a/llvm/lib/FileCheck/FileCheck.cpp b/llvm/lib/FileCheck/FileCheck.cpp
@@ -2318,7 +2318,6 @@ bool FileCheckString::CheckNot(const SourceMgr &SM, StringRef Buffer,
     PrintMatch(false, SM, Prefix, Pat->getLoc(), *Pat, 1, Buffer, Pos, MatchLen,
                Req, Diags);
     DirectiveFail = true;
-    continue;
   }
 
   return DirectiveFail;
diff --git a/llvm/lib/IR/AutoUpgrade.cpp b/llvm/lib/IR/AutoUpgrade.cpp
@@ -1769,7 +1769,6 @@ void llvm::UpgradeInlineAsmString(std::string *AsmStr) {
       (Pos = AsmStr->find("# marker")) != std::string::npos) {
     AsmStr->replace(Pos, 1, ";");
   }
-  return;
 }
 
 /// Upgrade a call to an old intrinsic. All argument and return casting must be
diff --git a/llvm/lib/Passes/StandardInstrumentations.cpp b/llvm/lib/Passes/StandardInstrumentations.cpp
@@ -501,7 +501,6 @@ void PrintIRInstrumentation::printBeforePass(StringRef PassID, Any IR) {
 
   SmallString<20> Banner = formatv("*** IR Dump Before {0} ***", PassID);
   unwrapAndPrint(dbgs(), IR, Banner, forcePrintModuleIR());
-  return;
 }
 
 void PrintIRInstrumentation::printAfterPass(StringRef PassID, Any IR) {
diff --git a/llvm/lib/Support/Unix/Path.inc b/llvm/lib/Support/Unix/Path.inc
@@ -685,8 +685,6 @@ void expand_tilde(const Twine &path, SmallVectorImpl<char> &dest) {
 
   path.toVector(dest);
   expandTildeExpr(dest);
-
-  return;
 }
 
 static file_type typeForMode(mode_t Mode) {
diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -3955,7 +3955,6 @@ void selectGatherScatterAddrMode(SDValue &BasePtr, SDValue &Index, EVT MemVT,
   Opcode = NewOp;
   BasePtr = Index->getOperand(0);
   Index = ConstOffset;
-  return;
 }
 
 SDValue AArch64TargetLowering::LowerMGATHER(SDValue Op,
diff --git a/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp b/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
@@ -1873,7 +1873,6 @@ void AArch64InstructionSelector::materializeLargeCMVal(
                               AArch64II::MO_G1 | AArch64II::MO_NC, 16, 0);
   DstReg = BuildMovK(DstReg, AArch64II::MO_G2 | AArch64II::MO_NC, 32, 0);
   BuildMovK(DstReg, AArch64II::MO_G3, 48, I.getOperand(0).getReg());
-  return;
 }
 
 bool AArch64InstructionSelector::preISelLower(MachineInstr &I) {
diff --git a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp
@@ -58,7 +58,6 @@ void AMDGPUAsmBackend::relaxInstruction(MCInst &Inst,
   Res.setOpcode(RelaxedOpcode);
   Res.addOperand(Inst.getOperand(0));
   Inst = std::move(Res);
-  return;
 }
 
 bool AMDGPUAsmBackend::fixupNeedsRelaxation(const MCFixup &Fixup,
diff --git a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
@@ -3087,7 +3087,6 @@ class ARMOperand : public MCParsedAsmOperand {
     // This is container for the immediate that we will create the constant
     // pool from
     addExpr(Inst, getConstantPoolImm());
-    return;
   }
 
   void addMemTBBOperands(MCInst &Inst, unsigned N) const {
diff --git a/llvm/lib/Target/ARM/MVEGatherScatterLowering.cpp b/llvm/lib/Target/ARM/MVEGatherScatterLowering.cpp
@@ -853,7 +853,6 @@ void MVEGatherScatterLowering::pushOutMul(PHINode *&Phi,
   Phi->addIncoming(NewIncrement, Phi->getIncomingBlock(LoopIncrement));
   Phi->removeIncomingValue((unsigned)0);
   Phi->removeIncomingValue((unsigned)0);
-  return;
 }
 
 // Check whether all usages of this instruction are as offsets of
diff --git a/llvm/lib/Target/BPF/BPFISelDAGToDAG.cpp b/llvm/lib/Target/BPF/BPFISelDAGToDAG.cpp
@@ -494,8 +494,6 @@ void BPFDAGToDAGISel::PreprocessTrunc(SDNode *Node,
   CurDAG->ReplaceAllUsesWith(SDValue(Node, 0), BaseV);
   I++;
   CurDAG->DeleteNode(Node);
-
-  return;
 }
 
 FunctionPass *llvm::createBPFISelDag(BPFTargetMachine &TM) {
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -13805,7 +13805,6 @@ static void fixupShuffleMaskForPermutedSToV(SmallVectorImpl<int> &ShuffV,
     if ((Idx >= 0 && Idx < LHSMaxIdx) || (Idx >= RHSMinIdx && Idx < RHSMaxIdx))
       ShuffV[i] += HalfVec;
   }
-  return;
 }
 
 // Replace a SCALAR_TO_VECTOR with a SCALAR_TO_VECTOR_PERMUTED except if
diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp
@@ -165,7 +165,6 @@ void RISCVInstPrinter::printAtomicMemOp(const MCInst *MI, unsigned OpNo,
   O << "(";
   printRegName(O, MO.getReg());
   O << ")";
-  return;
 }
 
 void RISCVInstPrinter::printVTypeI(const MCInst *MI, unsigned OpNo,
diff --git a/llvm/lib/Target/X86/X86FlagsCopyLowering.cpp b/llvm/lib/Target/X86/X86FlagsCopyLowering.cpp
@@ -981,5 +981,4 @@ void X86FlagsCopyLoweringPass::rewriteSetCC(MachineBasicBlock &TestMBB,
   MIB.setMemRefs(SetCCI.memoperands());
 
   SetCCI.eraseFromParent();
-  return;
 }
diff --git a/llvm/lib/Target/X86/X86IndirectThunks.cpp b/llvm/lib/Target/X86/X86IndirectThunks.cpp
@@ -95,7 +95,6 @@ struct LVIThunkInserter : ThunkInserter<LVIThunkInserter> {
     BuildMI(&MF.front(), DebugLoc(), TII->get(X86::LFENCE));
     BuildMI(&MF.front(), DebugLoc(), TII->get(X86::JMP64r)).addReg(X86::R11);
     MF.front().addLiveIn(X86::R11);
-    return;
   }
 };
 
diff --git a/llvm/lib/TextAPI/MachO/InterfaceFile.cpp b/llvm/lib/TextAPI/MachO/InterfaceFile.cpp
@@ -69,7 +69,6 @@ void InterfaceFile::addParentUmbrella(const Target &Target_, StringRef Parent) {
   }
 
   ParentUmbrellas.emplace(Iter, Target_, std::string(Parent));
-  return;
 }
 
 void InterfaceFile::addUUID(const Target &Target_, StringRef UUID) {
@@ -83,7 +82,6 @@ void InterfaceFile::addUUID(const Target &Target_, StringRef UUID) {
   }
 
   UUIDs.emplace(Iter, Target_, std::string(UUID));
-  return;
 }
 
 void InterfaceFile::addUUID(const Target &Target, uint8_t UUID[16]) {
diff --git a/llvm/lib/Transforms/Coroutines/CoroFrame.cpp b/llvm/lib/Transforms/Coroutines/CoroFrame.cpp
@@ -2011,8 +2011,6 @@ static void sinkSpillUsesAfterCoroBegin(Function &F,
   Instruction *InsertPt = CoroBegin->getNextNode();
   for (Instruction *Inst : InsertionList)
     Inst->moveBefore(InsertPt);
-
-  return;
 }
 
 /// For each local variable that all of its user are only used inside one of
diff --git a/llvm/lib/Transforms/IPO/AttributorAttributes.cpp b/llvm/lib/Transforms/IPO/AttributorAttributes.cpp
@@ -3499,7 +3499,6 @@ struct AADereferenceableImpl : AADereferenceable {
         State.addAccessedBytes(Offset, Size);
       }
     }
-    return;
   }
 
   /// See followUsesInMBEC
diff --git a/llvm/lib/Transforms/IPO/IROutliner.cpp b/llvm/lib/Transforms/IPO/IROutliner.cpp
@@ -1127,8 +1127,6 @@ void createSwitchStatement(Module &M, OutlinableGroup &OG, BasicBlock *EndBB,
     Term->moveBefore(*EndBB, EndBB->end());
     OutputBlock->eraseFromParent();
   }
-
-  return;
 }
 
 /// Fill the new function that will serve as the replacement function for all of
diff --git a/llvm/lib/Transforms/IPO/OpenMPOpt.cpp b/llvm/lib/Transforms/IPO/OpenMPOpt.cpp
@@ -1134,7 +1134,6 @@ struct OpenMPOpt {
 
       RFI.foreachUse(SCC, CheckGlobalization);
     }
-    return;
   }
 
   /// Maps the values stored in the offload arrays passed as arguments to
diff --git a/llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp b/llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
@@ -2214,6 +2214,4 @@ void DevirtIndex::run() {
   if (PrintSummaryDevirt)
     for (const auto &DT : DevirtTargets)
       errs() << "Devirtualized call to " << DT << "\n";
-
-  return;
 }
diff --git a/llvm/lib/Transforms/Scalar/LowerMatrixIntrinsics.cpp b/llvm/lib/Transforms/Scalar/LowerMatrixIntrinsics.cpp
@@ -1809,7 +1809,6 @@ class LowerMatrixIntrinsics {
 
       for (Value *Op : cast<Instruction>(V)->operand_values())
         collectSharedInfo(Leaf, Op, ExprsInSubprogram, Shared);
-      return;
     }
 
     /// Calculate the number of exclusive and shared op counts for expression
diff --git a/llvm/tools/llvm-mca/CodeRegion.cpp b/llvm/tools/llvm-mca/CodeRegion.cpp
@@ -63,7 +63,6 @@ void CodeRegions::beginRegion(StringRef Description, SMLoc Loc) {
 
   ActiveRegions[Description] = Regions.size();
   Regions.emplace_back(std::make_unique<CodeRegion>(Description, Loc));
-  return;
 }
 
 void CodeRegions::endRegion(StringRef Description, SMLoc Loc) {
diff --git a/llvm/tools/llvm-pdbutil/DumpOutputStyle.cpp b/llvm/tools/llvm-pdbutil/DumpOutputStyle.cpp
@@ -1907,7 +1907,6 @@ void DumpOutputStyle::dumpSectionHeaders(StringRef Label, DbgHeaderType Type) {
                             P.getIndentLevel(), Header.Characteristics, 1, ""));
     ++I;
   }
-  return;
 }
 
 Error DumpOutputStyle::dumpSectionContribs() {
diff --git a/llvm/tools/llvm-profdata/llvm-profdata.cpp b/llvm/tools/llvm-profdata/llvm-profdata.cpp
@@ -2254,7 +2254,6 @@ static void dumpHotFunctionList(const std::vector<std::string> &ColumnTitle,
     FOS.PadToColumn(ColumnOffset[3]);
     FOS << R.FuncName << "\n";
   }
-  return;
 }
 
 static int
diff --git a/llvm/tools/llvm-profgen/ProfiledBinary.cpp b/llvm/tools/llvm-profgen/ProfiledBinary.cpp
@@ -108,8 +108,6 @@ void ProfiledBinary::load() {
   ProEpilogTracker.inferEpilogOffsets(RetAddrs);
 
   // TODO: decode other sections.
-
-  return;
 }
 
 bool ProfiledBinary::inlineContextEqual(uint64_t Address1,
diff --git a/llvm/utils/TableGen/X86FoldTablesEmitter.cpp b/llvm/utils/TableGen/X86FoldTablesEmitter.cpp
@@ -571,8 +571,6 @@ void X86FoldTablesEmitter::updateTables(const CodeGenInstruction *RegInstr,
         getRegOperandSize(RegOpRec) == getMemOperandSize(MemOpRec))
       addEntryWithFlags(Table0, RegInstr, MemInstr, S, 0);
   }
-
-  return;
 }
 
 void X86FoldTablesEmitter::run(formatted_raw_ostream &OS) {

Original file line number	Diff line number	Diff line change
`@@ -67,7 +67,6 @@ class LiveRegUnits {`
`67`	`67`	`UsedRegUnits.addReg(Reg);`
`68`	`68`	`}`
`69`	`69`	`}`
`70`		`- return;`
`71`	`70`	`}`
`72`	`71`
`73`	`72`	`/// Initialize and clear the set.`
Original file line number	Diff line number	Diff line change
`@@ -1751,7 +1751,6 @@ void SwingSchedulerDAG::checkNodeSets(NodeSetType &NodeSets) {`
`1751`	`1751`	`}`
`1752`	`1752`	`NodeSets.clear();`
`1753`	`1753`	`LLVM_DEBUG(dbgs() << "Clear recurrence node-sets\n");`
`1754`		`- return;`
`1755`	`1754`	`}`
`1756`	`1755`
`1757`	`1756`	`/// Add the nodes that do not belong to a recurrence set into groups`
Original file line number	Diff line number	Diff line change
`@@ -649,5 +649,4 @@ void SpecialTableSymbolNode::output(OutputStream &OS, OutputFlags Flags) const {`
`649`	`649`	`TargetName->output(OS, Flags);`
`650`	`650`	`OS << "'}";`
`651`	`651`	`}`
`652`		`- return;`
`653`	`652`	`}`
Original file line number	Diff line number	Diff line change
`@@ -2318,7 +2318,6 @@ bool FileCheckString::CheckNot(const SourceMgr &SM, StringRef Buffer,`
`2318`	`2318`	`PrintMatch(false, SM, Prefix, Pat->getLoc(), *Pat, 1, Buffer, Pos, MatchLen,`
`2319`	`2319`	`Req, Diags);`
`2320`	`2320`	`DirectiveFail = true;`
`2321`		`- continue;`
`2322`	`2321`	`}`
`2323`	`2322`
`2324`	`2323`	`return DirectiveFail;`
Original file line number	Diff line number	Diff line change
`@@ -1769,7 +1769,6 @@ void llvm::UpgradeInlineAsmString(std::string *AsmStr) {`
`1769`	`1769`	`(Pos = AsmStr->find("# marker")) != std::string::npos) {`
`1770`	`1770`	`AsmStr->replace(Pos, 1, ";");`
`1771`	`1771`	`}`
`1772`		`- return;`
`1773`	`1772`	`}`
`1774`	`1773`
`1775`	`1774`	`/// Upgrade a call to an old intrinsic. All argument and return casting must be`
Original file line number	Diff line number	Diff line change
`@@ -501,7 +501,6 @@ void PrintIRInstrumentation::printBeforePass(StringRef PassID, Any IR) {`
`501`	`501`
`502`	`502`	`SmallString<20> Banner = formatv("* IR Dump Before {0} *", PassID);`
`503`	`503`	`unwrapAndPrint(dbgs(), IR, Banner, forcePrintModuleIR());`
`504`		`- return;`
`505`	`504`	`}`
`506`	`505`
`507`	`506`	`void PrintIRInstrumentation::printAfterPass(StringRef PassID, Any IR) {`
Original file line number	Diff line number	Diff line change
`@@ -685,8 +685,6 @@ void expand_tilde(const Twine &path, SmallVectorImpl<char> &dest) {`
`685`	`685`
`686`	`686`	`path.toVector(dest);`
`687`	`687`	`expandTildeExpr(dest);`
`688`		`-`
`689`		`- return;`
`690`	`688`	`}`
`691`	`689`
`692`	`690`	`static file_type typeForMode(mode_t Mode) {`
Original file line number	Diff line number	Diff line change
`@@ -3955,7 +3955,6 @@ void selectGatherScatterAddrMode(SDValue &BasePtr, SDValue &Index, EVT MemVT,`
`3955`	`3955`	`Opcode = NewOp;`
`3956`	`3956`	`BasePtr = Index->getOperand(0);`
`3957`	`3957`	`Index = ConstOffset;`
`3958`		`- return;`
`3959`	`3958`	`}`
`3960`	`3959`
`3961`	`3960`	`SDValue AArch64TargetLowering::LowerMGATHER(SDValue Op,`
Original file line number	Diff line number	Diff line change
`@@ -1873,7 +1873,6 @@ void AArch64InstructionSelector::materializeLargeCMVal(`
`1873`	`1873`	`AArch64II::MO_G1 \| AArch64II::MO_NC, 16, 0);`
`1874`	`1874`	`DstReg = BuildMovK(DstReg, AArch64II::MO_G2 \| AArch64II::MO_NC, 32, 0);`
`1875`	`1875`	`BuildMovK(DstReg, AArch64II::MO_G3, 48, I.getOperand(0).getReg());`
`1876`		`- return;`
`1877`	`1876`	`}`
`1878`	`1877`
`1879`	`1878`	`bool AArch64InstructionSelector::preISelLower(MachineInstr &I) {`
Original file line number	Diff line number	Diff line change
`@@ -58,7 +58,6 @@ void AMDGPUAsmBackend::relaxInstruction(MCInst &Inst,`
`58`	`58`	`Res.setOpcode(RelaxedOpcode);`
`59`	`59`	`Res.addOperand(Inst.getOperand(0));`
`60`	`60`	`Inst = std::move(Res);`
`61`		`- return;`
`62`	`61`	`}`
`63`	`62`
`64`	`63`	`bool AMDGPUAsmBackend::fixupNeedsRelaxation(const MCFixup &Fixup,`