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[MachineLoop] New helper isLoopInvariant()
This factors out code from MachineLICM that determines whether an instruction is loop-invariant, which is a generally useful function. Thus this allows to use that helper elsewhere too. Differential Revision: https://reviews.llvm.org/D94082
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3 files changed

+63
-49
lines changed

3 files changed

+63
-49
lines changed

llvm/include/llvm/CodeGen/MachineLoopInfo.h

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -67,6 +67,12 @@ class MachineLoop : public LoopBase<MachineBasicBlock, MachineLoop> {
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/// it returns an unknown location.
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DebugLoc getStartLoc() const;
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/// Returns true if the instruction is loop invariant.
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/// I.e., all virtual register operands are defined outside of the loop,
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/// physical registers aren't accessed explicitly, and there are no side
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/// effects that aren't captured by the operands or other flags.
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bool isLoopInvariant(MachineInstr &I) const;
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void dump() const;
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private:

llvm/lib/CodeGen/MachineLICM.cpp

Lines changed: 1 addition & 49 deletions
Original file line numberDiff line numberDiff line change
@@ -1079,60 +1079,12 @@ bool MachineLICMBase::IsLICMCandidate(MachineInstr &I) {
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}
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/// Returns true if the instruction is loop invariant.
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/// I.e., all virtual register operands are defined outside of the loop,
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/// physical registers aren't accessed explicitly, and there are no side
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/// effects that aren't captured by the operands or other flags.
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bool MachineLICMBase::IsLoopInvariantInst(MachineInstr &I) {
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if (!IsLICMCandidate(I)) {
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LLVM_DEBUG(dbgs() << "LICM: Instruction not a LICM candidate\n");
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return false;
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}
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// The instruction is loop invariant if all of its operands are.
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for (const MachineOperand &MO : I.operands()) {
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if (!MO.isReg())
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continue;
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Register Reg = MO.getReg();
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if (Reg == 0) continue;
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// Don't hoist an instruction that uses or defines a physical register.
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if (Register::isPhysicalRegister(Reg)) {
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if (MO.isUse()) {
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// If the physreg has no defs anywhere, it's just an ambient register
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// and we can freely move its uses. Alternatively, if it's allocatable,
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// it could get allocated to something with a def during allocation.
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// However, if the physreg is known to always be caller saved/restored
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// then this use is safe to hoist.
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if (!MRI->isConstantPhysReg(Reg) &&
1108-
!(TRI->isCallerPreservedPhysReg(Reg.asMCReg(), *I.getMF())))
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return false;
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// Otherwise it's safe to move.
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continue;
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} else if (!MO.isDead()) {
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// A def that isn't dead. We can't move it.
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return false;
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} else if (CurLoop->getHeader()->isLiveIn(Reg)) {
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// If the reg is live into the loop, we can't hoist an instruction
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// which would clobber it.
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return false;
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}
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}
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if (!MO.isUse())
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continue;
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assert(MRI->getVRegDef(Reg) &&
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"Machine instr not mapped for this vreg?!");
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// If the loop contains the definition of an operand, then the instruction
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// isn't loop invariant.
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if (CurLoop->contains(MRI->getVRegDef(Reg)))
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return false;
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}
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// If we got this far, the instruction is loop invariant!
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return true;
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return CurLoop->isLoopInvariant(I);
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}
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/// Return true if the specified instruction is used by a phi node and hoisting

llvm/lib/CodeGen/MachineLoopInfo.cpp

Lines changed: 56 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -16,11 +16,14 @@
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#include "llvm/CodeGen/MachineLoopInfo.h"
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#include "llvm/Analysis/LoopInfoImpl.h"
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#include "llvm/CodeGen/MachineDominators.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/CodeGen/TargetSubtargetInfo.h"
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#include "llvm/Config/llvm-config.h"
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#include "llvm/InitializePasses.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/raw_ostream.h"
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using namespace llvm;
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// Explicitly instantiate methods in LoopInfoImpl.h for MI-level Loops.
@@ -146,6 +149,59 @@ MachineLoopInfo::findLoopPreheader(MachineLoop *L,
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return Preheader;
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}
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bool MachineLoop::isLoopInvariant(MachineInstr &I) const {
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MachineFunction *MF = I.getParent()->getParent();
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MachineRegisterInfo *MRI = &MF->getRegInfo();
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const TargetRegisterInfo *TRI = MF->getSubtarget().getRegisterInfo();
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// The instruction is loop invariant if all of its operands are.
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for (const MachineOperand &MO : I.operands()) {
159+
if (!MO.isReg())
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continue;
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Register Reg = MO.getReg();
163+
if (Reg == 0) continue;
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// An instruction that uses or defines a physical register can't e.g. be
166+
// hoisted, so mark this as not invariant.
167+
if (Register::isPhysicalRegister(Reg)) {
168+
if (MO.isUse()) {
169+
// If the physreg has no defs anywhere, it's just an ambient register
170+
// and we can freely move its uses. Alternatively, if it's allocatable,
171+
// it could get allocated to something with a def during allocation.
172+
// However, if the physreg is known to always be caller saved/restored
173+
// then this use is safe to hoist.
174+
if (!MRI->isConstantPhysReg(Reg) &&
175+
!(TRI->isCallerPreservedPhysReg(Reg.asMCReg(), *I.getMF())))
176+
return false;
177+
// Otherwise it's safe to move.
178+
continue;
179+
} else if (!MO.isDead()) {
180+
// A def that isn't dead can't be moved.
181+
return false;
182+
} else if (getHeader()->isLiveIn(Reg)) {
183+
// If the reg is live into the loop, we can't hoist an instruction
184+
// which would clobber it.
185+
return false;
186+
}
187+
}
188+
189+
if (!MO.isUse())
190+
continue;
191+
192+
assert(MRI->getVRegDef(Reg) &&
193+
"Machine instr not mapped for this vreg?!");
194+
195+
// If the loop contains the definition of an operand, then the instruction
196+
// isn't loop invariant.
197+
if (contains(MRI->getVRegDef(Reg)))
198+
return false;
199+
}
200+
201+
// If we got this far, the instruction is loop invariant!
202+
return true;
203+
}
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149205
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
150206
LLVM_DUMP_METHOD void MachineLoop::dump() const {
151207
print(dbgs());

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