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[SLP] Add additional tests which caused crashes with versioning.
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‎llvm/test/Transforms/SLPVectorizer/AArch64/memory-runtime-checks-in-loops.ll

Lines changed: 93 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,6 @@
11
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
22
; RUN: opt -slp-vectorizer -mtriple=arm64-apple-ios -S %s | FileCheck %s
3+
; RUN: opt -aa-pipeline='basic-aa,scoped-noalias-aa' -passes=slp-vectorizer -mtriple=arm64-apple-darwin -S %s | FileCheck %s
34

45
define void @loop1(i32* %A, i32* %B, i64 %N) {
56
; CHECK-LABEL: @loop1(
@@ -174,3 +175,95 @@ loop:
174175
exit:
175176
ret void
176177
}
178+
179+
; Similar to @loop1, but a load is used in a phi in the same basic block.
180+
define i32 @value_used_in_phi(i32* %A, i32* %B, i64 %N) {
181+
; CHECK-LABEL: @value_used_in_phi(
182+
; CHECK-NEXT: entry:
183+
; CHECK-NEXT: br label [[LOOP:%.*]]
184+
; CHECK: loop:
185+
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
186+
; CHECK-NEXT: [[P:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[A_3:%.*]], [[LOOP]] ]
187+
; CHECK-NEXT: [[B_GEP_0:%.*]] = getelementptr inbounds i32, i32* [[B:%.*]], i64 [[IV]]
188+
; CHECK-NEXT: [[B_0:%.*]] = load i32, i32* [[B_GEP_0]], align 4
189+
; CHECK-NEXT: [[A_GEP_0:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[IV]]
190+
; CHECK-NEXT: [[A_0:%.*]] = load i32, i32* [[A_GEP_0]], align 4
191+
; CHECK-NEXT: [[ADD_0:%.*]] = add i32 [[A_0]], 20
192+
; CHECK-NEXT: [[XOR_0:%.*]] = xor i32 [[ADD_0]], [[B_0]]
193+
; CHECK-NEXT: store i32 [[XOR_0]], i32* [[A_GEP_0]], align 4
194+
; CHECK-NEXT: [[IV_1:%.*]] = or i64 [[IV]], 1
195+
; CHECK-NEXT: [[B_GEP_1:%.*]] = getelementptr inbounds i32, i32* [[B]], i64 [[IV_1]]
196+
; CHECK-NEXT: [[B_1:%.*]] = load i32, i32* [[B_GEP_1]], align 4
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; CHECK-NEXT: [[A_GEP_1:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[IV_1]]
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; CHECK-NEXT: [[A_1:%.*]] = load i32, i32* [[A_GEP_1]], align 4
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; CHECK-NEXT: [[ADD_1:%.*]] = add i32 [[A_1]], 20
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; CHECK-NEXT: [[XOR_1:%.*]] = xor i32 [[ADD_1]], [[B_1]]
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; CHECK-NEXT: store i32 [[XOR_1]], i32* [[A_GEP_1]], align 4
202+
; CHECK-NEXT: [[IV_2:%.*]] = or i64 [[IV]], 2
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; CHECK-NEXT: [[B_GEP_2:%.*]] = getelementptr inbounds i32, i32* [[B]], i64 [[IV_2]]
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; CHECK-NEXT: [[B_2:%.*]] = load i32, i32* [[B_GEP_2]], align 4
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; CHECK-NEXT: [[A_GEP_2:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[IV_2]]
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; CHECK-NEXT: [[A_2:%.*]] = load i32, i32* [[A_GEP_2]], align 4
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; CHECK-NEXT: [[ADD_2:%.*]] = add i32 [[A_2]], 20
208+
; CHECK-NEXT: [[XOR_2:%.*]] = xor i32 [[ADD_2]], [[B_2]]
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; CHECK-NEXT: store i32 [[XOR_2]], i32* [[A_GEP_2]], align 4
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; CHECK-NEXT: [[IV_3:%.*]] = or i64 [[IV]], 3
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; CHECK-NEXT: [[B_GEP_3:%.*]] = getelementptr inbounds i32, i32* [[B]], i64 [[IV_3]]
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; CHECK-NEXT: [[B_3:%.*]] = load i32, i32* [[B_GEP_3]], align 4
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; CHECK-NEXT: [[A_GEP_3:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[IV_3]]
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; CHECK-NEXT: [[A_3]] = load i32, i32* [[A_GEP_3]], align 4
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; CHECK-NEXT: [[ADD_3:%.*]] = add i32 [[A_3]], 20
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; CHECK-NEXT: [[XOR_3:%.*]] = xor i32 [[ADD_3]], [[B_3]]
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; CHECK-NEXT: store i32 [[XOR_3]], i32* [[A_GEP_3]], align 4
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; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 16
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; CHECK-NEXT: [[COND:%.*]] = icmp ult i64 [[IV_NEXT]], [[N:%.*]]
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; CHECK-NEXT: br i1 [[COND]], label [[LOOP]], label [[EXIT:%.*]]
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; CHECK: exit:
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; CHECK-NEXT: ret i32 [[P]]
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;
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entry:
225+
br label %loop
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loop:
228+
%iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
229+
%p = phi i32 [ 0, %entry ], [ %A.3, %loop ]
230+
%B.gep.0 = getelementptr inbounds i32, i32* %B, i64 %iv
231+
%B.0 = load i32, i32* %B.gep.0, align 4
232+
%A.gep.0 = getelementptr inbounds i32, i32* %A, i64 %iv
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%A.0 = load i32, i32* %A.gep.0, align 4
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%add.0 = add i32 %A.0, 20
235+
%xor.0 = xor i32 %add.0, %B.0
236+
store i32 %xor.0, i32* %A.gep.0, align 4
237+
%iv.1 = or i64 %iv, 1
238+
%B.gep.1 = getelementptr inbounds i32, i32* %B, i64 %iv.1
239+
%B.1 = load i32, i32* %B.gep.1, align 4
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%A.gep.1 = getelementptr inbounds i32, i32* %A, i64 %iv.1
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%A.1 = load i32, i32* %A.gep.1, align 4
242+
%add.1 = add i32 %A.1, 20
243+
%xor.1 = xor i32 %add.1, %B.1
244+
store i32 %xor.1, i32* %A.gep.1, align 4
245+
%iv.2 = or i64 %iv, 2
246+
%B.gep.2 = getelementptr inbounds i32, i32* %B, i64 %iv.2
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%B.2 = load i32, i32* %B.gep.2, align 4
248+
%A.gep.2 = getelementptr inbounds i32, i32* %A, i64 %iv.2
249+
%A.2 = load i32, i32* %A.gep.2, align 4
250+
%add.2 = add i32 %A.2, 20
251+
%xor.2 = xor i32 %add.2, %B.2
252+
store i32 %xor.2, i32* %A.gep.2, align 4
253+
%iv.3 = or i64 %iv, 3
254+
%B.gep.3 = getelementptr inbounds i32, i32* %B, i64 %iv.3
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%B.3 = load i32, i32* %B.gep.3, align 4
256+
%A.gep.3 = getelementptr inbounds i32, i32* %A, i64 %iv.3
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%A.3 = load i32, i32* %A.gep.3, align 4
258+
%add.3 = add i32 %A.3, 20
259+
%xor.3 = xor i32 %add.3, %B.3
260+
store i32 %xor.3, i32* %A.gep.3, align 4
261+
%iv.next = add nuw nsw i64 %iv, 16
262+
%cond = icmp ult i64 %iv.next, %N
263+
br i1 %cond, label %loop, label %exit
264+
265+
exit:
266+
ret i32 %p
267+
}
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‎llvm/test/Transforms/SLPVectorizer/AArch64/memory-runtime-checks.ll

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,6 @@
11
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
22
; RUN: opt -scoped-noalias-aa -slp-vectorizer -mtriple=arm64-apple-darwin -enable-new-pm=false -S %s | FileCheck %s
3+
; RUN: opt -aa-pipeline='basic-aa,scoped-noalias-aa' -passes=slp-vectorizer -mtriple=arm64-apple-darwin -S %s | FileCheck %s
34

45
define void @needs_versioning_not_profitable(i32* %dst, i32* %src) {
56
; CHECK-LABEL: @needs_versioning_not_profitable(

‎llvm/test/Transforms/SLPVectorizer/X86/memory-runtime-checks.ll

Lines changed: 155 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,6 @@
11
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
22
; RUN: opt -scoped-noalias-aa -slp-vectorizer -mtriple=x86_64-apple-darwin -enable-new-pm=false -S %s | FileCheck %s
3+
; RUN: opt -aa-pipeline='basic-aa,scoped-noalias-aa' -passes=slp-vectorizer -mtriple=x86_64-apple-darwin -S %s | FileCheck %s
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define void @version_multiple(i32* nocapture %out_block, i32* nocapture readonly %counter) {
56
; CHECK-LABEL: @version_multiple(
@@ -185,4 +186,158 @@ bb14: ; preds = %bb13
185186
ret double undef
186187
}
187188

189+
define void @gather_sequence_crash(<2 x float> %arg, float* %arg1, float %arg2, float* %arg3, float* %arg4, float* %arg5, i1 %c.1, i1 %c.2) {
190+
; CHECK-LABEL: @gather_sequence_crash(
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; CHECK-NEXT: bb:
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; CHECK-NEXT: br i1 [[C_1:%.*]], label [[BB16:%.*]], label [[BB6:%.*]]
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; CHECK: bb6:
194+
; CHECK-NEXT: [[TMP:%.*]] = getelementptr inbounds float, float* [[ARG1:%.*]], i32 4
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; CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds float, float* [[ARG1]], i32 5
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; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds float, float* [[ARG1]], i32 3
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; CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds float, float* [[ARG1]], i32 6
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; CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x float> <float poison, float poison, float poison, float 0.000000e+00>, float [[ARG2:%.*]], i32 0
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; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <2 x float> [[ARG:%.*]], <2 x float> poison, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
200+
; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <4 x float> [[TMP0]], <4 x float> [[TMP1]], <4 x i32> <i32 0, i32 4, i32 5, i32 3>
201+
; CHECK-NEXT: [[TMP3:%.*]] = fmul <4 x float> [[TMP2]], zeroinitializer
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; CHECK-NEXT: [[TMP4:%.*]] = bitcast float* [[TMP8]] to <4 x float>*
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; CHECK-NEXT: store <4 x float> [[TMP3]], <4 x float>* [[TMP4]], align 4
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; CHECK-NEXT: ret void
205+
; CHECK: bb16:
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; CHECK-NEXT: br label [[BB17:%.*]]
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; CHECK: bb17:
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; CHECK-NEXT: br label [[BB18:%.*]]
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; CHECK: bb18:
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; CHECK-NEXT: br label [[BB19:%.*]]
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; CHECK: bb19:
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; CHECK-NEXT: br label [[BB20:%.*]]
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; CHECK: bb20:
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; CHECK-NEXT: br label [[BB21:%.*]]
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; CHECK: bb21:
216+
; CHECK-NEXT: br label [[BB22:%.*]]
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; CHECK: bb22:
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; CHECK-NEXT: [[TMP23:%.*]] = getelementptr inbounds float, float* [[ARG4:%.*]], i32 0
219+
; CHECK-NEXT: [[TMP24:%.*]] = getelementptr float, float* [[TMP23]], i64 7
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; CHECK-NEXT: br i1 [[C_2:%.*]], label [[BB25:%.*]], label [[BB22]]
221+
; CHECK: bb25:
222+
; CHECK-NEXT: [[TMP26:%.*]] = getelementptr float, float* [[TMP23]], i64 6
223+
; CHECK-NEXT: store float 0.000000e+00, float* [[TMP24]], align 4
224+
; CHECK-NEXT: [[TMP27:%.*]] = load float, float* [[ARG5:%.*]], align 4
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; CHECK-NEXT: [[TMP28:%.*]] = getelementptr float, float* [[TMP23]], i64 5
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; CHECK-NEXT: [[TMP29:%.*]] = fadd float 0.000000e+00, 0.000000e+00
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; CHECK-NEXT: store float 0.000000e+00, float* [[TMP26]], align 4
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; CHECK-NEXT: [[TMP30:%.*]] = getelementptr float, float* [[TMP23]], i64 4
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; CHECK-NEXT: store float 0.000000e+00, float* [[TMP28]], align 4
230+
; CHECK-NEXT: [[TMP31:%.*]] = fadd float 0.000000e+00, 0.000000e+00
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; CHECK-NEXT: store float 0.000000e+00, float* [[TMP30]], align 4
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; CHECK-NEXT: [[TMP32:%.*]] = getelementptr inbounds float, float* [[ARG4]], i32 0
233+
; CHECK-NEXT: br label [[BB33:%.*]]
234+
; CHECK: bb33:
235+
; CHECK-NEXT: br label [[BB34:%.*]]
236+
; CHECK: bb34:
237+
; CHECK-NEXT: [[TMP35:%.*]] = getelementptr float, float* [[TMP32]], i64 3
238+
; CHECK-NEXT: [[TMP36:%.*]] = getelementptr float, float* [[TMP32]], i64 2
239+
; CHECK-NEXT: [[TMP37:%.*]] = load float, float* [[TMP35]], align 4
240+
; CHECK-NEXT: [[TMP38:%.*]] = fadd float 0.000000e+00, [[TMP37]]
241+
; CHECK-NEXT: store float [[TMP38]], float* [[TMP35]], align 4
242+
; CHECK-NEXT: [[TMP39:%.*]] = getelementptr float, float* [[TMP32]], i64 1
243+
; CHECK-NEXT: [[TMP40:%.*]] = load float, float* [[TMP36]], align 4
244+
; CHECK-NEXT: [[TMP41:%.*]] = fadd float 0.000000e+00, [[TMP40]]
245+
; CHECK-NEXT: store float [[TMP41]], float* [[TMP36]], align 4
246+
; CHECK-NEXT: [[TMP42:%.*]] = load float, float* [[TMP39]], align 4
247+
; CHECK-NEXT: [[TMP43:%.*]] = fadd float 0.000000e+00, [[TMP42]]
248+
; CHECK-NEXT: store float [[TMP43]], float* [[TMP39]], align 4
249+
; CHECK-NEXT: [[TMP44:%.*]] = load float, float* [[ARG3:%.*]], align 4
250+
; CHECK-NEXT: [[TMP45:%.*]] = load float, float* [[TMP32]], align 4
251+
; CHECK-NEXT: [[TMP46:%.*]] = fadd float 0.000000e+00, [[TMP45]]
252+
; CHECK-NEXT: store float [[TMP46]], float* [[TMP32]], align 4
253+
; CHECK-NEXT: call void @quux()
254+
; CHECK-NEXT: br label [[BB47:%.*]]
255+
; CHECK: bb47:
256+
; CHECK-NEXT: br label [[BB17]]
257+
;
258+
bb:
259+
br i1 %c.1, label %bb16, label %bb6
260+
261+
bb6: ; preds = %bb
262+
%tmp = getelementptr inbounds float, float* %arg1, i32 4
263+
%tmp7 = getelementptr inbounds float, float* %arg1, i32 5
264+
%tmp8 = getelementptr inbounds float, float* %arg1, i32 3
265+
%tmp9 = getelementptr inbounds float, float* %arg1, i32 6
266+
%tmp10 = extractelement <2 x float> %arg, i32 0
267+
%tmp11 = fmul float %tmp10, 0.000000e+00
268+
store float %tmp11, float* %tmp, align 4
269+
%tmp12 = extractelement <2 x float> %arg, i32 1
270+
%tmp13 = fmul float %tmp12, 0.000000e+00
271+
store float %tmp13, float* %tmp7, align 4
272+
%tmp14 = fmul float %arg2, 0.000000e+00
273+
store float %tmp14, float* %tmp8, align 4
274+
%tmp15 = fmul float 0.000000e+00, 0.000000e+00
275+
store float %tmp15, float* %tmp9, align 4
276+
ret void
277+
278+
bb16: ; preds = %bb
279+
br label %bb17
280+
281+
bb17: ; preds = %bb47, %bb16
282+
br label %bb18
283+
284+
bb18: ; preds = %bb17
285+
br label %bb19
286+
287+
bb19: ; preds = %bb18
288+
br label %bb20
289+
290+
bb20: ; preds = %bb19
291+
br label %bb21
292+
293+
bb21: ; preds = %bb20
294+
br label %bb22
295+
296+
bb22: ; preds = %bb22, %bb21
297+
%tmp23 = getelementptr inbounds float, float* %arg4, i32 0
298+
%tmp24 = getelementptr float, float* %tmp23, i64 7
299+
br i1 %c.2, label %bb25, label %bb22
300+
301+
bb25: ; preds = %bb22
302+
%tmp26 = getelementptr float, float* %tmp23, i64 6
303+
store float 0.000000e+00, float* %tmp24, align 4
304+
%tmp27 = load float, float* %arg5, align 4
305+
%tmp28 = getelementptr float, float* %tmp23, i64 5
306+
%tmp29 = fadd float 0.000000e+00, 0.000000e+00
307+
store float 0.000000e+00, float* %tmp26, align 4
308+
%tmp30 = getelementptr float, float* %tmp23, i64 4
309+
store float 0.000000e+00, float* %tmp28, align 4
310+
%tmp31 = fadd float 0.000000e+00, 0.000000e+00
311+
store float 0.000000e+00, float* %tmp30, align 4
312+
%tmp32 = getelementptr inbounds float, float* %arg4, i32 0
313+
br label %bb33
314+
315+
bb33: ; preds = %bb25
316+
br label %bb34
317+
318+
bb34: ; preds = %bb33
319+
%tmp35 = getelementptr float, float* %tmp32, i64 3
320+
%tmp36 = getelementptr float, float* %tmp32, i64 2
321+
%tmp37 = load float, float* %tmp35, align 4
322+
%tmp38 = fadd float 0.000000e+00, %tmp37
323+
store float %tmp38, float* %tmp35, align 4
324+
%tmp39 = getelementptr float, float* %tmp32, i64 1
325+
%tmp40 = load float, float* %tmp36, align 4
326+
%tmp41 = fadd float 0.000000e+00, %tmp40
327+
store float %tmp41, float* %tmp36, align 4
328+
%tmp42 = load float, float* %tmp39, align 4
329+
%tmp43 = fadd float 0.000000e+00, %tmp42
330+
store float %tmp43, float* %tmp39, align 4
331+
%tmp44 = load float, float* %arg3, align 4
332+
%tmp45 = load float, float* %tmp32, align 4
333+
%tmp46 = fadd float 0.000000e+00, %tmp45
334+
store float %tmp46, float* %tmp32, align 4
335+
call void @quux()
336+
br label %bb47
337+
338+
bb47: ; preds = %bb34
339+
br label %bb17
340+
}
341+
342+
declare void @quux()
188343
attributes #0 = { "target-features"="+avx2" }

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