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RegAllocFast: Add extra DBG_VALUE for live out spills
This allows LiveDebugValues to insert the proper DBG_VALUEs in live out blocks if a spill is inserted before the use of a register. Previously, this would see the register use as the last DBG_VALUE, even though the stack slot should be treated as the live out value. This avoids an lldb test regression when D52010 is re-applied.
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7 files changed

+249
-13
lines changed

7 files changed

+249
-13
lines changed

‎llvm/lib/CodeGen/RegAllocFast.cpp

Lines changed: 16 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -255,7 +255,7 @@ namespace {
255255

256256
int getStackSpaceFor(Register VirtReg);
257257
void spill(MachineBasicBlock::iterator Before, Register VirtReg,
258-
MCPhysReg AssignedReg, bool Kill);
258+
MCPhysReg AssignedReg, bool Kill, bool LiveOut);
259259
void reload(MachineBasicBlock::iterator Before, Register VirtReg,
260260
MCPhysReg PhysReg);
261261

@@ -384,7 +384,7 @@ bool RegAllocFast::mayLiveIn(Register VirtReg) {
384384
/// Insert spill instruction for \p AssignedReg before \p Before. Update
385385
/// DBG_VALUEs with \p VirtReg operands with the stack slot.
386386
void RegAllocFast::spill(MachineBasicBlock::iterator Before, Register VirtReg,
387-
MCPhysReg AssignedReg, bool Kill) {
387+
MCPhysReg AssignedReg, bool Kill, bool LiveOut) {
388388
LLVM_DEBUG(dbgs() << "Spilling " << printReg(VirtReg, TRI)
389389
<< " in " << printReg(AssignedReg, TRI));
390390
int FI = getStackSpaceFor(VirtReg);
@@ -394,6 +394,8 @@ void RegAllocFast::spill(MachineBasicBlock::iterator Before, Register VirtReg,
394394
TII->storeRegToStackSlot(*MBB, Before, AssignedReg, Kill, FI, &RC, TRI);
395395
++NumStores;
396396

397+
MachineBasicBlock::iterator FirstTerm = MBB->getFirstTerminator();
398+
397399
// When we spill a virtual register, we will have spill instructions behind
398400
// every definition of it, meaning we can switch all the DBG_VALUEs over
399401
// to just reference the stack slot.
@@ -403,6 +405,17 @@ void RegAllocFast::spill(MachineBasicBlock::iterator Before, Register VirtReg,
403405
assert(NewDV->getParent() == MBB && "dangling parent pointer");
404406
(void)NewDV;
405407
LLVM_DEBUG(dbgs() << "Inserting debug info due to spill:\n" << *NewDV);
408+
409+
if (LiveOut) {
410+
// We need to insert a DBG_VALUE at the end of the block if the spill slot
411+
// is live out, but there is another use of the value after the
412+
// spill. This will allow LiveDebugValues to see the correct live out
413+
// value to propagate to the successors.
414+
MachineInstr *ClonedDV = MBB->getParent()->CloneMachineInstr(NewDV);
415+
MBB->insert(FirstTerm, ClonedDV);
416+
LLVM_DEBUG(dbgs() << "Cloning debug info due to live out spill\n");
417+
}
418+
406419
// Rewrite unassigned dbg_values to use the stack slot.
407420
MachineOperand &MO = DBG->getOperand(0);
408421
if (MO.isReg() && MO.getReg() == 0)
@@ -868,7 +881,7 @@ void RegAllocFast::defineVirtReg(MachineInstr &MI, unsigned OpNum,
868881
LLVM_DEBUG(dbgs() << "Spill Reason: LO: " << LRI->LiveOut << " RL: "
869882
<< LRI->Reloaded << '\n');
870883
bool Kill = LRI->LastUse == nullptr;
871-
spill(SpillBefore, VirtReg, PhysReg, Kill);
884+
spill(SpillBefore, VirtReg, PhysReg, Kill, LRI->LiveOut);
872885
LRI->LastUse = nullptr;
873886
}
874887
LRI->LiveOut = false;

‎llvm/test/CodeGen/X86/fast-regalloc-live-out-debug-values.mir

Lines changed: 222 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,222 @@
1+
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2+
# RUN: llc -O0 -mtriple=x86_64-unknown-linux-gnu -start-before=regallocfast -stop-after=livedebugvalues -verify-machineinstrs -o - %s | FileCheck %s
3+
# DBG_VALUEs for %0 should be present in the use blocks
4+
5+
--- |
6+
define dso_local i32 @foo(i32 %a) #0 !dbg !6 {
7+
entry:
8+
%a.addr = alloca i32, align 4
9+
%saved_stack = alloca i8*, align 8
10+
%__vla_expr0 = alloca i64, align 8
11+
%i = alloca i32, align 4
12+
store i32 %a, i32* %a.addr, align 4
13+
call void @llvm.dbg.declare(metadata i32* %a.addr, metadata !11, metadata !DIExpression()), !dbg !12
14+
%0 = load i32, i32* %a.addr, align 4, !dbg !13
15+
%1 = zext i32 %0 to i64, !dbg !14
16+
%2 = call i8* @llvm.stacksave(), !dbg !14
17+
store i8* %2, i8** %saved_stack, align 8, !dbg !14
18+
%vla = alloca i32, i64 %1, align 16, !dbg !14
19+
store i64 %1, i64* %__vla_expr0, align 8, !dbg !14
20+
call void @llvm.dbg.declare(metadata i64* %__vla_expr0, metadata !15, metadata !DIExpression()), !dbg !17
21+
call void @llvm.dbg.declare(metadata i32* %vla, metadata !18, metadata !DIExpression()), !dbg !22
22+
call void @llvm.dbg.declare(metadata i32* %i, metadata !23, metadata !DIExpression()), !dbg !25
23+
store i32 0, i32* %i, align 4, !dbg !25
24+
br label %for.cond, !dbg !26
25+
26+
for.cond: ; preds = %for.inc, %entry
27+
%3 = load i32, i32* %i, align 4, !dbg !27
28+
%4 = load i32, i32* %a.addr, align 4, !dbg !29
29+
%cmp = icmp slt i32 %3, %4, !dbg !30
30+
br i1 %cmp, label %for.body, label %for.end, !dbg !31
31+
32+
for.body: ; preds = %for.cond
33+
%5 = load i32, i32* %a.addr, align 4, !dbg !32
34+
%6 = load i32, i32* %i, align 4, !dbg !33
35+
%sub = sub nsw i32 %5, %6, !dbg !34
36+
%7 = load i32, i32* %i, align 4, !dbg !35
37+
%idxprom = sext i32 %7 to i64, !dbg !36
38+
%arrayidx = getelementptr inbounds i32, i32* %vla, i64 %idxprom, !dbg !36
39+
store i32 %sub, i32* %arrayidx, align 4, !dbg !37
40+
br label %for.inc, !dbg !36
41+
42+
for.inc: ; preds = %for.body
43+
%8 = load i32, i32* %i, align 4, !dbg !38
44+
%inc = add nsw i32 %8, 1, !dbg !38
45+
store i32 %inc, i32* %i, align 4, !dbg !38
46+
br label %for.cond, !dbg !39, !llvm.loop !40
47+
48+
for.end: ; preds = %for.cond
49+
%9 = load i32, i32* %a.addr, align 4, !dbg !42
50+
%sub1 = sub nsw i32 %9, 1, !dbg !43
51+
%idxprom2 = sext i32 %sub1 to i64, !dbg !44
52+
%arrayidx3 = getelementptr inbounds i32, i32* %vla, i64 %idxprom2, !dbg !44
53+
%10 = load i32, i32* %arrayidx3, align 4, !dbg !44
54+
%11 = load i8*, i8** %saved_stack, align 8, !dbg !45
55+
call void @llvm.stackrestore(i8* %11), !dbg !45
56+
ret i32 %10, !dbg !45
57+
}
58+
59+
declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
60+
declare i8* @llvm.stacksave() #2
61+
declare void @llvm.stackrestore(i8*) #2
62+
63+
attributes #0 = { noinline nounwind optnone uwtable }
64+
attributes #1 = { nounwind readnone speculatable willreturn }
65+
attributes #2 = { nounwind }
66+
67+
!llvm.dbg.cu = !{!0}
68+
!llvm.module.flags = !{!3, !4, !5}
69+
70+
!0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang version 12.0.0 ([email protected]:llvm/llvm-project.git 954995d0a45729c7935b82258c166524ee87ad3f)", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, splitDebugInlining: false, nameTableKind: None)
71+
!1 = !DIFile(filename: "/home/matt/src/llvm-project/lldb/test/API/lang/c/vla/main.c", directory: "/home/matt/src/llvm-project/build_debug_lldbg")
72+
!2 = !{}
73+
!3 = !{i32 7, !"Dwarf Version", i32 4}
74+
!4 = !{i32 2, !"Debug Info Version", i32 3}
75+
!5 = !{i32 1, !"wchar_size", i32 4}
76+
!6 = distinct !DISubprogram(name: "foo", scope: !7, file: !7, line: 3, type: !8, scopeLine: 3, flags: DIFlagPrototyped, spFlags: DISPFlagDefinition, unit: !0, retainedNodes: !2)
77+
!7 = !DIFile(filename: "lldb/test/API/lang/c/vla/main.c", directory: "/home/matt/src/llvm-project")
78+
!8 = !DISubroutineType(types: !9)
79+
!9 = !{!10, !10}
80+
!10 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)
81+
!11 = !DILocalVariable(name: "a", arg: 1, scope: !6, file: !7, line: 3, type: !10)
82+
!12 = !DILocation(line: 3, column: 13, scope: !6)
83+
!13 = !DILocation(line: 4, column: 11, scope: !6)
84+
!14 = !DILocation(line: 4, column: 3, scope: !6)
85+
!15 = !DILocalVariable(name: "__vla_expr0", scope: !6, type: !16, flags: DIFlagArtificial)
86+
!16 = !DIBasicType(name: "long unsigned int", size: 64, encoding: DW_ATE_unsigned)
87+
!17 = !DILocation(line: 0, scope: !6)
88+
!18 = !DILocalVariable(name: "vla", scope: !6, file: !7, line: 4, type: !19)
89+
!19 = !DICompositeType(tag: DW_TAG_array_type, baseType: !10, elements: !20)
90+
!20 = !{!21}
91+
!21 = !DISubrange(count: !15)
92+
!22 = !DILocation(line: 4, column: 7, scope: !6)
93+
!23 = !DILocalVariable(name: "i", scope: !24, file: !7, line: 6, type: !10)
94+
!24 = distinct !DILexicalBlock(scope: !6, file: !7, line: 6, column: 3)
95+
!25 = !DILocation(line: 6, column: 12, scope: !24)
96+
!26 = !DILocation(line: 6, column: 8, scope: !24)
97+
!27 = !DILocation(line: 6, column: 19, scope: !28)
98+
!28 = distinct !DILexicalBlock(scope: !24, file: !7, line: 6, column: 3)
99+
!29 = !DILocation(line: 6, column: 23, scope: !28)
100+
!30 = !DILocation(line: 6, column: 21, scope: !28)
101+
!31 = !DILocation(line: 6, column: 3, scope: !24)
102+
!32 = !DILocation(line: 7, column: 14, scope: !28)
103+
!33 = !DILocation(line: 7, column: 16, scope: !28)
104+
!34 = !DILocation(line: 7, column: 15, scope: !28)
105+
!35 = !DILocation(line: 7, column: 9, scope: !28)
106+
!36 = !DILocation(line: 7, column: 5, scope: !28)
107+
!37 = !DILocation(line: 7, column: 12, scope: !28)
108+
!38 = !DILocation(line: 6, column: 26, scope: !28)
109+
!39 = !DILocation(line: 6, column: 3, scope: !28)
110+
!40 = distinct !{!40, !31, !41}
111+
!41 = !DILocation(line: 7, column: 16, scope: !24)
112+
!42 = !DILocation(line: 10, column: 14, scope: !6)
113+
!43 = !DILocation(line: 10, column: 15, scope: !6)
114+
!44 = !DILocation(line: 10, column: 10, scope: !6)
115+
!45 = !DILocation(line: 11, column: 1, scope: !6)
116+
117+
...
118+
---
119+
name: foo
120+
tracksRegLiveness: true
121+
frameInfo:
122+
hasCalls: true
123+
stack:
124+
- { id: 0, name: a.addr, size: 4, alignment: 4, debug-info-variable: '!11',
125+
debug-info-expression: '!DIExpression()', debug-info-location: '!12' }
126+
- { id: 1, name: __vla_expr0, size: 8, alignment: 8, debug-info-variable: '!15',
127+
debug-info-expression: '!DIExpression()', debug-info-location: '!17' }
128+
- { id: 2, name: i, size: 4, alignment: 4, debug-info-variable: '!23',
129+
debug-info-expression: '!DIExpression()', debug-info-location: '!25' }
130+
- { id: 3, name: vla, type: variable-sized, alignment: 1 }
131+
body: |
132+
; CHECK-LABEL: name: foo
133+
; CHECK: bb.0.entry:
134+
; CHECK: successors: %bb.1(0x80000000)
135+
; CHECK: liveins: $edi, $rbx
136+
; CHECK: frame-setup PUSH64r killed $rbp, implicit-def $rsp, implicit $rsp
137+
; CHECK: CFI_INSTRUCTION def_cfa_offset 16
138+
; CHECK: CFI_INSTRUCTION offset $rbp, -16
139+
; CHECK: $rbp = frame-setup MOV64rr $rsp
140+
; CHECK: CFI_INSTRUCTION def_cfa_register $rbp
141+
; CHECK: frame-setup PUSH64r killed $rbx, implicit-def $rsp, implicit $rsp, debug-location !13
142+
; CHECK: $rsp = frame-setup SUB64ri8 $rsp, 40, implicit-def dead $eflags
143+
; CHECK: CFI_INSTRUCTION offset $rbx, -24
144+
; CHECK: renamable $eax = MOV32rm $rbp, 1, $noreg, -12, $noreg, debug-location !13 :: (dereferenceable load 4 from %ir.a.addr)
145+
; CHECK: renamable $rax = KILL killed renamable $eax, debug-location !13
146+
; CHECK: $rcx = MOV64rr $rsp, debug-location !14
147+
; CHECK: MOV64mr $rbp, 1, $noreg, -40, $noreg, $rcx :: (store 8 into %stack.4)
148+
; CHECK: DBG_VALUE $rbp, 0, !18, !DIExpression(DW_OP_constu, 40, DW_OP_minus, DW_OP_deref), debug-location !22
149+
; CHECK: $rsp = MOV64rr $rcx, debug-location !14
150+
; CHECK: MOV64mr $rbp, 1, $noreg, -24, $noreg, killed renamable $rax, debug-location !14 :: (store 8 into %ir.__vla_expr0)
151+
; CHECK: DBG_VALUE renamable $rcx, 0, !18, !DIExpression(), debug-location !22
152+
; CHECK: MOV32mi $rbp, 1, $noreg, -28, $noreg, 0, debug-location !25 :: (store 4 into %ir.i)
153+
; CHECK: DBG_VALUE $rbp, 0, !18, !DIExpression(DW_OP_constu, 40, DW_OP_minus, DW_OP_deref), debug-location !22
154+
; CHECK: bb.1.for.cond:
155+
; CHECK: successors: %bb.4(0x40000000), %bb.2(0x40000000)
156+
; CHECK: DBG_VALUE $rbp, 0, !18, !DIExpression(DW_OP_constu, 40, DW_OP_minus, DW_OP_deref), debug-location !22
157+
; CHECK: renamable $eax = MOV32rm $rbp, 1, $noreg, -28, $noreg, debug-location !27 :: (load 4 from %ir.i)
158+
; CHECK: CMP32rm killed renamable $eax, $rbp, 1, $noreg, -12, $noreg, implicit-def $eflags, debug-location !30 :: (load 4 from %ir.a.addr)
159+
; CHECK: JCC_1 %bb.4, 13, implicit killed $eflags, debug-location !31
160+
; CHECK: bb.2.for.body:
161+
; CHECK: successors: %bb.3(0x80000000)
162+
; CHECK: DBG_VALUE $rbp, 0, !18, !DIExpression(DW_OP_constu, 40, DW_OP_minus, DW_OP_deref), debug-location !22
163+
; CHECK: $rax = MOV64rm $rbp, 1, $noreg, -40, $noreg :: (load 8 from %stack.4)
164+
; CHECK: renamable $edx = MOV32rm $rbp, 1, $noreg, -12, $noreg, debug-location !32 :: (load 4 from %ir.a.addr)
165+
; CHECK: renamable $rcx = MOVSX64rm32 $rbp, 1, $noreg, -28, $noreg, debug-location !36 :: (load 4 from %ir.i)
166+
; CHECK: MOV32mr renamable $rax, 4, killed renamable $rcx, 0, $noreg, killed renamable $edx, debug-location !37 :: (store 4 into %ir.arrayidx)
167+
; CHECK: bb.3.for.inc:
168+
; CHECK: successors: %bb.1(0x80000000)
169+
; CHECK: DBG_VALUE $rbp, 0, !18, !DIExpression(DW_OP_constu, 40, DW_OP_minus, DW_OP_deref), debug-location !22
170+
; CHECK: JMP_1 %bb.1, debug-location !39
171+
; CHECK: bb.4.for.end:
172+
; CHECK: DBG_VALUE $rbp, 0, !18, !DIExpression(DW_OP_constu, 40, DW_OP_minus, DW_OP_deref), debug-location !22
173+
; CHECK: $rax = IMPLICIT_DEF
174+
; CHECK: $rax = MOV64rm $rbp, 1, $noreg, -40, $noreg :: (load 8 from %stack.4)
175+
; CHECK: dead $rbx = IMPLICIT_DEF
176+
; CHECK: dead $rcx = IMPLICIT_DEF
177+
; CHECK: dead $rdx = IMPLICIT_DEF
178+
; CHECK: renamable $rcx = IMPLICIT_DEF
179+
; CHECK: renamable $eax = MOV32rm killed renamable $rax, 4, killed renamable $rcx, 0, $noreg, debug-location !44 :: (load 4 from %ir.arrayidx3)
180+
; CHECK: $rsp = LEA64r $rbp, 1, $noreg, -8, $noreg, debug-location !45
181+
; CHECK: $rbx = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !45
182+
; CHECK: $rbp = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !45
183+
; CHECK: CFI_INSTRUCTION def_cfa $rsp, 8, debug-location !45
184+
; CHECK: RETQ implicit killed $eax, debug-location !45
185+
bb.0.entry:
186+
liveins: $edi
187+
188+
%0:gr32 = COPY $edi
189+
%1:gr32 = MOV32rm %stack.0.a.addr, 1, $noreg, 0, $noreg, debug-location !13 :: (dereferenceable load 4 from %ir.a.addr)
190+
%2:gr64_nosp = SUBREG_TO_REG 0, killed %1, %subreg.sub_32bit, debug-location !13
191+
ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp, debug-location !14
192+
%3:gr64 = COPY $rsp, debug-location !14
193+
$rsp = COPY %3, debug-location !14
194+
ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp, debug-location !14
195+
MOV64mr %stack.1.__vla_expr0, 1, $noreg, 0, $noreg, %2, debug-location !14 :: (store 8 into %ir.__vla_expr0)
196+
DBG_VALUE %3, 0, !18, !DIExpression(), debug-location !22
197+
MOV32mi %stack.2.i, 1, $noreg, 0, $noreg, 0, debug-location !25 :: (store 4 into %ir.i)
198+
199+
bb.1.for.cond:
200+
%4:gr32 = MOV32rm %stack.2.i, 1, $noreg, 0, $noreg, debug-location !27 :: (load 4 from %ir.i)
201+
CMP32rm %4, %stack.0.a.addr, 1, $noreg, 0, $noreg, implicit-def $eflags, debug-location !30 :: (load 4 from %ir.a.addr)
202+
JCC_1 %bb.4, 13, implicit $eflags, debug-location !31
203+
204+
bb.2.for.body:
205+
%5:gr32 = MOV32rm %stack.0.a.addr, 1, $noreg, 0, $noreg, debug-location !32 :: (load 4 from %ir.a.addr)
206+
%6:gr64_nosp = MOVSX64rm32 %stack.2.i, 1, $noreg, 0, $noreg, debug-location !36 :: (load 4 from %ir.i)
207+
MOV32mr %3, 4, %6, 0, $noreg, killed %5, debug-location !37 :: (store 4 into %ir.arrayidx)
208+
209+
bb.3.for.inc:
210+
JMP_1 %bb.1, debug-location !39
211+
212+
bb.4.for.end:
213+
$rax = IMPLICIT_DEF
214+
$rbx = IMPLICIT_DEF
215+
$rcx = IMPLICIT_DEF
216+
$rdx = IMPLICIT_DEF
217+
%7:gr64_nosp = IMPLICIT_DEF
218+
%8:gr32 = MOV32rm %3, 4, %7, 0, $noreg, debug-location !44 :: (load 4 from %ir.arrayidx3)
219+
$eax = COPY %8, debug-location !45
220+
RETQ implicit $eax, debug-location !45
221+
222+
...

‎llvm/test/DebugInfo/X86/fission-ranges.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -51,7 +51,7 @@
5151
; CHECK-NEXT: DW_LLE_end_of_list ()
5252
; CHECK: [[E]]:
5353
; CHECK-NEXT: DW_LLE_startx_length (0x00000005, 0x0000000b): DW_OP_reg0 RAX
54-
; CHECK-NEXT: DW_LLE_startx_length (0x00000006, 0x0000005a): DW_OP_breg7 RSP-36
54+
; CHECK-NEXT: DW_LLE_startx_length (0x00000006, 0x0000005a): DW_OP_breg7 RSP-48
5555
; CHECK-NEXT: DW_LLE_end_of_list ()
5656
; CHECK: [[B]]:
5757
; CHECK-NEXT: DW_LLE_startx_length (0x00000007, 0x0000000b): DW_OP_reg0 RAX

‎llvm/test/DebugInfo/X86/op_deref.ll

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -7,7 +7,8 @@
77

88
; DWARF4: DW_AT_location [DW_FORM_sec_offset] (0x00000000
99
; DWARF4-NEXT: {{.*}}: DW_OP_breg6 RBP-40, DW_OP_deref, DW_OP_deref
10-
; DWARF4-NEXT: {{.*}}: DW_OP_breg0 RAX+0, DW_OP_deref)
10+
; DWARF4-NEXT: {{.*}}: DW_OP_breg0 RAX+0, DW_OP_deref
11+
; DWARF4-NEXT: {{.*}}: DW_OP_breg6 RBP-40, DW_OP_deref, DW_OP_deref)
1112

1213
; DWARF3: DW_AT_location [DW_FORM_data4] (0x00000000
1314
; DWARF3-NEXT: {{.*}}: DW_OP_breg6 RBP-40, DW_OP_deref, DW_OP_deref

‎llvm/test/DebugInfo/X86/parameters.ll

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -38,7 +38,8 @@
3838
; CHECK: DW_TAG_formal_parameter
3939
; CHECK: DW_AT_location{{.*}}(
4040
; CHECK-NEXT: {{.*}}: DW_OP_breg7 RSP+8, DW_OP_deref, DW_OP_deref
41-
; CHECK-NEXT: {{.*}}: DW_OP_breg4 RSI+0, DW_OP_deref)
41+
; CHECK-NEXT: {{.*}}: DW_OP_breg4 RSI+0, DW_OP_deref
42+
; CHECK-NEXT: {{.*}}: DW_OP_breg7 RSP+8, DW_OP_deref, DW_OP_deref)
4243
; CHECK-NOT: DW_TAG
4344
; CHECK: DW_AT_name{{.*}} = "g"
4445

‎llvm/test/DebugInfo/X86/sret.ll

Lines changed: 6 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -3,17 +3,19 @@
33

44
; Based on the debuginfo-tests/sret.cpp code.
55

6-
; CHECK-DWO: DW_AT_GNU_dwo_id (0x409e35dbb641730e)
7-
; CHECK-DWO: DW_AT_GNU_dwo_id (0x409e35dbb641730e)
6+
; CHECK-DWO: DW_AT_GNU_dwo_id (0xa58a336e896549f1)
7+
; CHECK-DWO: DW_AT_GNU_dwo_id (0xa58a336e896549f1)
88

99
; RUN: llc -O0 -fast-isel=true -mtriple=x86_64-apple-darwin -filetype=obj -o - %s | llvm-dwarfdump -debug-info - | FileCheck -check-prefixes=CHECK,FASTISEL %s
1010
; RUN: llc -O0 -fast-isel=false -mtriple=x86_64-apple-darwin -filetype=obj -o - %s | llvm-dwarfdump -debug-info - | FileCheck -check-prefixes=CHECK,SDAG %s
1111
; CHECK: _ZN1B9AInstanceEv
1212
; CHECK: DW_TAG_variable
1313
; CHECK-NEXT: DW_AT_location (0x00000000
1414
; FASTISEL-NEXT: [{{.*}}, {{.*}}): DW_OP_breg6 RBP-32, DW_OP_deref
15-
; FASTISEL-NEXT: [{{.*}}, {{.*}}): DW_OP_breg5 RDI+0)
16-
; SDAG-NEXT: [{{.*}}, {{.*}}): DW_OP_breg5 RDI+0)
15+
; FASTISEL-NEXT: [{{.*}}, {{.*}}): DW_OP_breg5 RDI+0
16+
; FASTISEL-NEXT: [{{.*}}, {{.*}}): DW_OP_breg6 RBP-32, DW_OP_deref)
17+
; SDAG-NEXT: [{{.*}}, {{.*}}): DW_OP_breg5 RDI+0
18+
; SDAG-NEXT: [{{.*}}, {{.*}}): DW_OP_breg6 RBP-32, DW_OP_deref)
1719
; CHECK-NEXT: DW_AT_name {{.*}}"a"
1820

1921
%class.A = type { i32 (...)**, i32 }

‎llvm/test/DebugInfo/X86/subreg.ll

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -11,9 +11,6 @@
1111
define i16 @f(i16 signext %zzz) nounwind !dbg !1 {
1212
entry:
1313
call void @llvm.dbg.value(metadata i16 %zzz, metadata !0, metadata !DIExpression()), !dbg !DILocation(scope: !1)
14-
br label %exit
15-
16-
exit:
1714
%conv = sext i16 %zzz to i32, !dbg !7
1815
%conv1 = trunc i32 %conv to i16
1916
ret i16 %conv1

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