[SYCL][ESIMD] Change API based on the feedback from users (#2476)

Signed-off-by: Gang Y Chen <[email protected]>

Author: cmc-rep

sycl/include/CL/sycl/INTEL/esimd/esimd_memory.hpp

@@ -421,11 +421,6 @@ ESIMD_NODEBUG ESIMD_INLINE
 /// generic work-group barrier
 inline ESIMD_NODEBUG void esimd_barrier() { __esimd_barrier(); }
 
-/// SLM functions
-
-/// declare per-work-group slm size
-SYCL_EXTERNAL void slm_init(uint32_t size);
-
 enum EsimdFenceMask {
   ESIMD_GLOBAL_COHERENT_FENCE = 0x1,
   ESIMD_L3_FLUSH_INSTRUCTIONS = 0x2,
@@ -437,8 +432,15 @@ enum EsimdFenceMask {
   ESIMD_SW_BARRIER = 0x80
 };
 
-/// slm_fence sets the SLM read/write order
-inline ESIMD_NODEBUG void slm_fence(uint8_t cntl) { __esimd_slm_fence(cntl); }
+/// esimd_fence sets the memory read/write order
+ESIMD_INLINE ESIMD_NODEBUG void esimd_fence(uint8_t cntl) {
+  __esimd_slm_fence(cntl);
+}
+
+/// SLM functions
+
+/// declare per-work-group slm size
+SYCL_EXTERNAL void slm_init(uint32_t size);
 
 /// SLM gather
 /// only allow simd-16 and simd-32
@@ -459,18 +461,19 @@ ESIMD_INLINE ESIMD_NODEBUG
 }
 
 /// SLM gather4
-/// only allow simd-16 and simd-32
+/// only allow simd-8, simd-16 and simd-32
 template <typename T, int n, ChannelMaskType Mask>
 ESIMD_INLINE ESIMD_NODEBUG
-    typename std::enable_if<(n == 16 || n == 32) && (sizeof(T) == 4),
+    typename std::enable_if<(n == 8 || n == 16 || n == 32) && (sizeof(T) == 4),
                             simd<T, n * NumChannels(Mask)>>::type
     slm_load4(simd<uint32_t, n> offsets, simd<uint16_t, n> pred = 1) {
   return __esimd_slm_read4<T, n, Mask>(offsets.data(), pred.data());
 }
 
 /// SLM scatter4
 template <typename T, int n, ChannelMaskType Mask>
-typename std::enable_if<(n == 16 || n == 32) && (sizeof(T) == 4), void>::type
+typename std::enable_if<(n == 8 || n == 16 || n == 32) && (sizeof(T) == 4),
+                        void>::type
 slm_store4(simd<T, n * NumChannels(Mask)> vals, simd<uint32_t, n> offsets,
            simd<uint16_t, n> pred = 1) {
   __esimd_slm_write4<T, n, Mask>(offsets.data(), vals.data(), pred.data());

sycl/test/basic_tests/esimd/slm_load.cpp

@@ -15,7 +15,7 @@ void kernel() __attribute__((sycl_device)) {
 
   auto v0 = slm_load<int, 32>(offsets);
 
-  slm_fence(3);
+  esimd_fence(3);
   esimd_barrier();
 
   v0 = v0 + v1;

sycl/test/esimd/on-device/histogram_256_slm.cpp

@@ -38,7 +38,7 @@ ESIMD_INLINE void histogram_atomic(const uint32_t *input_ptr, uint32_t *output,
   slm_offset *= sizeof(int);
   simd<uint, 16> slm_data = 0;
   slm_store<uint, 16>(slm_data, slm_offset);
-  slm_fence(ESIMD_GLOBAL_COHERENT_FENCE);
+  esimd_fence(ESIMD_GLOBAL_COHERENT_FENCE);
   esimd_barrier();
 
   // Each thread handles NUM_BLOCKSxBLOCK_WIDTH pixel blocks
@@ -57,7 +57,7 @@ ESIMD_INLINE void histogram_atomic(const uint32_t *input_ptr, uint32_t *output,
     }
     start_off += BLOCK_WIDTH;
   }
-  slm_fence(ESIMD_GLOBAL_COHERENT_FENCE);
+  esimd_fence(ESIMD_GLOBAL_COHERENT_FENCE);
   esimd_barrier();
 
   // Update global sum by atomically adding each local histogram

sycl/test/esimd/on-device/slm_barrier.cpp

@@ -69,7 +69,7 @@ void load_to_slm(uint grpSize, uint localId, uint slmOffset, char *addr,
     vOffsets += (grpSize * 256);
   }
 
-  slm_fence(ESIMD_GLOBAL_COHERENT_FENCE);
+  esimd_fence(ESIMD_GLOBAL_COHERENT_FENCE);
   esimd_barrier();
 }