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[AArch64][SVE2] Add the SVE2.1 pmov instructions
This patch adds the assembly/disassembly for the following instructions: pmov : Move predicate to vector pmov : Move vector to predicate The reference can be found here: https://developer.arm.com/documentation/ddi0602/2022-09 Differential Revision: https://reviews.llvm.org/D137561
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‎llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td

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@@ -3762,4 +3762,7 @@ defm FMINQV : sve2p1_fp_reduction_q<0b111, "fminqv">;
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defm DUPQ_ZZI : sve2p1_dupq<"dupq">;
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def EXTQ_ZZI : sve2p1_extq<"extq">;
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defm PMOV_PZI : sve2p1_vector_to_pred<"pmov">;
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defm PMOV_ZIP : sve2p1_pred_to_vector<"pmov">;
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} // End HasSVE2p1_or_HasSME2p1

‎llvm/lib/Target/AArch64/SVEInstrFormats.td

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@@ -9363,3 +9363,82 @@ class sve2p1_extq<string mnemonic>
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let DestructiveInstType = DestructiveOther;
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let ElementSize = ZPR8.ElementSize;
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}
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// SVE move predicate from vector
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class sve2p1_vector_to_pred<bits<4> opc, string mnemonic,
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PPRRegOp ppr_ty, Operand itype>
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: I<(outs ppr_ty:$Pd), (ins ZPRAny:$Zn, itype:$index),
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mnemonic, "\t$Pd, $Zn$index",
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"", []>, Sched<[]> {
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bits<4> Pd;
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bits<5> Zn;
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let Inst{31-24} = 0b00000101;
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let Inst{23-22} = opc{3-2};
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let Inst{21-19} = 0b101;
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let Inst{18-17} = opc{1-0};
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let Inst{16-10} = 0b0001110;
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let Inst{9-5} = Zn;
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let Inst{4} = 0b0;
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let Inst{3-0} = Pd;
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}
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multiclass sve2p1_vector_to_pred<string mnemonic> {
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def _B : sve2p1_vector_to_pred<{0, 0, 0, 1}, mnemonic, PPR8, VectorIndex0>;
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def _H : sve2p1_vector_to_pred<{0, 0, 1, ?}, mnemonic, PPR16, VectorIndexD32b> {
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bits<1> index;
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let Inst{17} = index;
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}
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def _S : sve2p1_vector_to_pred<{0, 1, ?, ?}, mnemonic, PPR32, VectorIndexS32b> {
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bits<2> index;
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let Inst{18-17} = index;
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}
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def _D : sve2p1_vector_to_pred<{1, ?, ?, ?}, mnemonic, PPR64, VectorIndexH32b> {
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bits<3> index;
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let Inst{22} = index{2};
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let Inst{18-17} = index{1-0};
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}
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def : InstAlias<mnemonic # "\t$Pd, $Zn",
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(!cast<Instruction>(NAME # _B) PPR8:$Pd, ZPRAny:$Zn, 0), 1>;
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}
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// SVE move predicate into vector
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class sve2p1_pred_to_vector<bits<4> opc, string mnemonic,
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PPRRegOp ppr_ty, Operand itype>
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: I<(outs ZPRAny:$Zd), (ins ZPRAny:$_Zd, itype:$index, ppr_ty:$Pn),
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mnemonic, "\t$Zd$index, $Pn",
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"", []>, Sched<[]> {
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bits<5> Zd;
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bits<4> Pn;
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let Inst{31-24} = 0b00000101;
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let Inst{23-22} = opc{3-2};
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let Inst{21-19} = 0b101;
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let Inst{18-17} = opc{1-0};
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let Inst{16-9} = 0b10011100;
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let Inst{8-5} = Pn;
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let Inst{4-0} = Zd;
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let Constraints = "$Zd = $_Zd";
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}
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multiclass sve2p1_pred_to_vector<string mnemonic> {
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def _B : sve2p1_pred_to_vector<{0, 0, 0, 1}, mnemonic, PPR8, VectorIndex0>;
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def _H : sve2p1_pred_to_vector<{0, 0, 1, ?}, mnemonic, PPR16, VectorIndexD32b> {
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bits<1> index;
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let Inst{17} = index;
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}
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def _S : sve2p1_pred_to_vector<{0, 1, ?, ?}, mnemonic, PPR32, VectorIndexS32b> {
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bits<2> index;
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let Inst{18-17} = index;
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}
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def _D : sve2p1_pred_to_vector<{1, ?, ?, ?}, mnemonic, PPR64, VectorIndexH32b> {
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bits<3> index;
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let Inst{22} = index{2};
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let Inst{18-17} = index{1-0};
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}
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def : InstAlias<mnemonic # "\t$Zd, $Pn",
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(!cast<Instruction>(NAME # _B) ZPRAny:$Zd, 0, PPR8:$Pn), 1>;
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}

‎llvm/test/MC/AArch64/SVE2p1/pmov-diagnostics.s

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// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2p1 2>&1 < %s | FileCheck %s
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// --------------------------------------------------------------------------//
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// Invalid vector lane indices
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pmov p0.b, z0[1]
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: expected lane specifier '[0]'
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// CHECK-NEXT: pmov p0.b, z0[1]
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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pmov p0.h, z0[2]
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 1].
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// CHECK-NEXT: pmov p0.h, z0[2]
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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pmov p0.h, z0[-1]
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 1].
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// CHECK-NEXT: pmov p0.h, z0[-1]
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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pmov p0.s, z0[4]
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 3].
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// CHECK-NEXT: pmov p0.s, z0[4]
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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pmov p0.s, z0[-1]
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 3].
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// CHECK-NEXT: pmov p0.s, z0[-1]
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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pmov p0.d, z0[8]
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 7].
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// CHECK-NEXT: pmov p0.d, z0[8]
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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pmov p0.d, z0[-1]
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 7].
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// CHECK-NEXT: pmov p0.d, z0[-1]
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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pmov z0[2], p0.h
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate register.
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// CHECK-NEXT: pmov z0[2], p0.h
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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pmov z0[-1], p0.h
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 3].
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// CHECK-NEXT: pmov z0[-1], p0.h
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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pmov z0[4], p0.s
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate register.
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// CHECK-NEXT: pmov z0[4], p0.s
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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pmov z0[-1], p0.s
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 3].
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// CHECK-NEXT: pmov z0[-1], p0.s
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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pmov z0[8], p0.d
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 3].
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// CHECK-NEXT: pmov z0[8], p0.d
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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pmov z0[-1], p0.d
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 3].
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// CHECK-NEXT: pmov z0[-1], p0.d
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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‎llvm/test/MC/AArch64/SVE2p1/pmov.s

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// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2p1 < %s \
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// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
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// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2p1 < %s \
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// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
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// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
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// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
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// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme2p1 < %s \
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// RUN: | llvm-objdump -d --no-print-imm-hex --mattr=+sme2p1 - | FileCheck %s --check-prefix=CHECK-INST
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// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme2p1 < %s \
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// RUN: | llvm-objdump -d --mattr=-sme2p1,-sve2p1 - | FileCheck %s --check-prefix=CHECK-UNKNOWN
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// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2p1 < %s \
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// RUN: | sed '/.text/d' | sed 's/.*encoding: //g' \
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// RUN: | llvm-mc -triple=aarch64 -mattr=+sme2p1 -disassemble -show-encoding \
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// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
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pmov p0.h, z0[0] // 00000101-00101100-00111000-00000000
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// CHECK-INST: pmov p0.h, z0[0]
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// CHECK-ENCODING: [0x00,0x38,0x2c,0x05]
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// CHECK-ERROR: instruction requires: sme2p1 or sve2p1
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// CHECK-UNKNOWN: 052c3800 <unknown>
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pmov p5.h, z10[0] // 00000101-00101100-00111001-01000101
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// CHECK-INST: pmov p5.h, z10[0]
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// CHECK-ENCODING: [0x45,0x39,0x2c,0x05]
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// CHECK-ERROR: instruction requires: sme2p1 or sve2p1
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// CHECK-UNKNOWN: 052c3945 <unknown>
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pmov p7.h, z13[0] // 00000101-00101100-00111001-10100111
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// CHECK-INST: pmov p7.h, z13[0]
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// CHECK-ENCODING: [0xa7,0x39,0x2c,0x05]
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// CHECK-ERROR: instruction requires: sme2p1 or sve2p1
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// CHECK-UNKNOWN: 052c39a7 <unknown>
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pmov p15.h, z31[1] // 00000101-00101110-00111011-11101111
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// CHECK-INST: pmov p15.h, z31[1]
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// CHECK-ENCODING: [0xef,0x3b,0x2e,0x05]
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// CHECK-ERROR: instruction requires: sme2p1 or sve2p1
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// CHECK-UNKNOWN: 052e3bef <unknown>
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pmov p0.s, z0[0] // 00000101-01101000-00111000-00000000
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// CHECK-INST: pmov p0.s, z0[0]
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// CHECK-ENCODING: [0x00,0x38,0x68,0x05]
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// CHECK-ERROR: instruction requires: sme2p1 or sve2p1
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// CHECK-UNKNOWN: 05683800 <unknown>
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pmov p5.s, z10[2] // 00000101-01101100-00111001-01000101
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// CHECK-INST: pmov p5.s, z10[2]
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// CHECK-ENCODING: [0x45,0x39,0x6c,0x05]
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// CHECK-ERROR: instruction requires: sme2p1 or sve2p1
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// CHECK-UNKNOWN: 056c3945 <unknown>
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pmov p7.s, z13[0] // 00000101-01101000-00111001-10100111
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// CHECK-INST: pmov p7.s, z13[0]
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// CHECK-ENCODING: [0xa7,0x39,0x68,0x05]
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// CHECK-ERROR: instruction requires: sme2p1 or sve2p1
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// CHECK-UNKNOWN: 056839a7 <unknown>
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pmov p15.s, z31[3] // 00000101-01101110-00111011-11101111
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// CHECK-INST: pmov p15.s, z31[3]
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// CHECK-ENCODING: [0xef,0x3b,0x6e,0x05]
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// CHECK-ERROR: instruction requires: sme2p1 or sve2p1
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// CHECK-UNKNOWN: 056e3bef <unknown>
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pmov p0.d, z0[0] // 00000101-10101000-00111000-00000000
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// CHECK-INST: pmov p0.d, z0[0]
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// CHECK-ENCODING: [0x00,0x38,0xa8,0x05]
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// CHECK-ERROR: instruction requires: sme2p1 or sve2p1
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// CHECK-UNKNOWN: 05a83800 <unknown>
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pmov p5.d, z10[6] // 00000101-11101100-00111001-01000101
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// CHECK-INST: pmov p5.d, z10[6]
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// CHECK-ENCODING: [0x45,0x39,0xec,0x05]
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// CHECK-ERROR: instruction requires: sme2p1 or sve2p1
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// CHECK-UNKNOWN: 05ec3945 <unknown>
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pmov p7.d, z13[4] // 00000101-11101000-00111001-10100111
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// CHECK-INST: pmov p7.d, z13[4]
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// CHECK-ENCODING: [0xa7,0x39,0xe8,0x05]
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// CHECK-ERROR: instruction requires: sme2p1 or sve2p1
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// CHECK-UNKNOWN: 05e839a7 <unknown>
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pmov p15.d, z31[7] // 00000101-11101110-00111011-11101111
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// CHECK-INST: pmov p15.d, z31[7]
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// CHECK-ENCODING: [0xef,0x3b,0xee,0x05]
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// CHECK-ERROR: instruction requires: sme2p1 or sve2p1
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// CHECK-UNKNOWN: 05ee3bef <unknown>
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pmov p0.b, z0 // 00000101-00101010-00111000-00000000
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// CHECK-INST: pmov p0.b, z0
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// CHECK-ENCODING: [0x00,0x38,0x2a,0x05]
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// CHECK-ERROR: instruction requires: sme2p1 or sve2p1
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// CHECK-UNKNOWN: 052a3800 <unknown>
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pmov p5.b, z10 // 00000101-00101010-00111001-01000101
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// CHECK-INST: pmov p5.b, z10
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// CHECK-ENCODING: [0x45,0x39,0x2a,0x05]
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// CHECK-ERROR: instruction requires: sme2p1 or sve2p1
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// CHECK-UNKNOWN: 052a3945 <unknown>
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pmov p7.b, z13 // 00000101-00101010-00111001-10100111
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// CHECK-INST: pmov p7.b, z13
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// CHECK-ENCODING: [0xa7,0x39,0x2a,0x05]
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// CHECK-ERROR: instruction requires: sme2p1 or sve2p1
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// CHECK-UNKNOWN: 052a39a7 <unknown>
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pmov p15.b, z31 // 00000101-00101010-00111011-11101111
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// CHECK-INST: pmov p15.b, z31
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// CHECK-ENCODING: [0xef,0x3b,0x2a,0x05]
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// CHECK-ERROR: instruction requires: sme2p1 or sve2p1
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// CHECK-UNKNOWN: 052a3bef <unknown>
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pmov p0.b, z0[0] // 00000101-00101010-00111000-00000000
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// CHECK-INST: pmov p0.b, z0
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// CHECK-ENCODING: [0x00,0x38,0x2a,0x05]
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// CHECK-ERROR: instruction requires: sme2p1 or sve2p1
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// CHECK-UNKNOWN: 052a3800 <unknown>
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pmov z0[0], p0.h // 00000101-00101101-00111000-00000000
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// CHECK-INST: pmov z0[0], p0.h
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// CHECK-ENCODING: [0x00,0x38,0x2d,0x05]
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// CHECK-ERROR: instruction requires: sme2p1 or sve2p1
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// CHECK-UNKNOWN: 052d3800 <unknown>
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pmov z21[0], p10.h // 00000101-00101101-00111001-01010101
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// CHECK-INST: pmov z21[0], p10.h
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// CHECK-ENCODING: [0x55,0x39,0x2d,0x05]
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// CHECK-ERROR: instruction requires: sme2p1 or sve2p1
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// CHECK-UNKNOWN: 052d3955 <unknown>
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pmov z23[0], p13.h // 00000101-00101101-00111001-10110111
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// CHECK-INST: pmov z23[0], p13.h
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// CHECK-ENCODING: [0xb7,0x39,0x2d,0x05]
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// CHECK-ERROR: instruction requires: sme2p1 or sve2p1
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// CHECK-UNKNOWN: 052d39b7 <unknown>
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pmov z31[1], p15.h // 00000101-00101111-00111001-11111111
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// CHECK-INST: pmov z31[1], p15.h
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// CHECK-ENCODING: [0xff,0x39,0x2f,0x05]
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// CHECK-ERROR: instruction requires: sme2p1 or sve2p1
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// CHECK-UNKNOWN: 052f39ff <unknown>
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pmov z0[0], p0.s // 00000101-01101001-00111000-00000000
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// CHECK-INST: pmov z0[0], p0.s
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// CHECK-ENCODING: [0x00,0x38,0x69,0x05]
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// CHECK-ERROR: instruction requires: sme2p1 or sve2p1
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// CHECK-UNKNOWN: 05693800 <unknown>
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pmov z21[2], p10.s // 00000101-01101101-00111001-01010101
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// CHECK-INST: pmov z21[2], p10.s
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// CHECK-ENCODING: [0x55,0x39,0x6d,0x05]
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// CHECK-ERROR: instruction requires: sme2p1 or sve2p1
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// CHECK-UNKNOWN: 056d3955 <unknown>
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pmov z23[0], p13.s // 00000101-01101001-00111001-10110111
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// CHECK-INST: pmov z23[0], p13.s
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// CHECK-ENCODING: [0xb7,0x39,0x69,0x05]
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// CHECK-ERROR: instruction requires: sme2p1 or sve2p1
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// CHECK-UNKNOWN: 056939b7 <unknown>
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pmov z31[3], p15.s // 00000101-01101111-00111001-11111111
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// CHECK-INST: pmov z31[3], p15.s
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// CHECK-ENCODING: [0xff,0x39,0x6f,0x05]
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// CHECK-ERROR: instruction requires: sme2p1 or sve2p1
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// CHECK-UNKNOWN: 056f39ff <unknown>
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pmov z0[0], p0.d // 00000101-10101001-00111000-00000000
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// CHECK-INST: pmov z0[0], p0.d
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// CHECK-ENCODING: [0x00,0x38,0xa9,0x05]
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// CHECK-ERROR: instruction requires: sme2p1 or sve2p1
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// CHECK-UNKNOWN: 05a93800 <unknown>
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pmov z21[6], p10.d // 00000101-11101101-00111001-01010101
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// CHECK-INST: pmov z21[6], p10.d
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// CHECK-ENCODING: [0x55,0x39,0xed,0x05]
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// CHECK-ERROR: instruction requires: sme2p1 or sve2p1
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// CHECK-UNKNOWN: 05ed3955 <unknown>
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pmov z23[4], p13.d // 00000101-11101001-00111001-10110111
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// CHECK-INST: pmov z23[4], p13.d
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// CHECK-ENCODING: [0xb7,0x39,0xe9,0x05]
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// CHECK-ERROR: instruction requires: sme2p1 or sve2p1
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// CHECK-UNKNOWN: 05e939b7 <unknown>
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pmov z31[7], p15.d // 00000101-11101111-00111001-11111111
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// CHECK-INST: pmov z31[7], p15.d
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// CHECK-ENCODING: [0xff,0x39,0xef,0x05]
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// CHECK-ERROR: instruction requires: sme2p1 or sve2p1
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// CHECK-UNKNOWN: 05ef39ff <unknown>
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pmov z0, p0.b // 00000101-00101011-00111000-00000000
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// CHECK-INST: pmov z0, p0.b
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// CHECK-ENCODING: [0x00,0x38,0x2b,0x05]
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// CHECK-ERROR: instruction requires: sme2p1 or sve2p1
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// CHECK-UNKNOWN: 052b3800 <unknown>
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pmov z21, p10.b // 00000101-00101011-00111001-01010101
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// CHECK-INST: pmov z21, p10.b
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// CHECK-ENCODING: [0x55,0x39,0x2b,0x05]
201+
// CHECK-ERROR: instruction requires: sme2p1 or sve2p1
202+
// CHECK-UNKNOWN: 052b3955 <unknown>
203+
204+
pmov z23, p13.b // 00000101-00101011-00111001-10110111
205+
// CHECK-INST: pmov z23, p13.b
206+
// CHECK-ENCODING: [0xb7,0x39,0x2b,0x05]
207+
// CHECK-ERROR: instruction requires: sme2p1 or sve2p1
208+
// CHECK-UNKNOWN: 052b39b7 <unknown>
209+
210+
pmov z31, p15.b // 00000101-00101011-00111001-11111111
211+
// CHECK-INST: pmov z31, p15.b
212+
// CHECK-ENCODING: [0xff,0x39,0x2b,0x05]
213+
// CHECK-ERROR: instruction requires: sme2p1 or sve2p1
214+
// CHECK-UNKNOWN: 052b39ff <unknown>
215+
216+
pmov z0[0], p0.b // 00000101-00101011-00111000-00000000
217+
// CHECK-INST: pmov z0, p0.b
218+
// CHECK-ENCODING: [0x00,0x38,0x2b,0x05]
219+
// CHECK-ERROR: instruction requires: sme2p1 or sve2p1
220+
// CHECK-UNKNOWN: 052b3800 <unknown>

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