@@ -265,7 +265,7 @@ def gen_suld_tests(target, global_surf):
265265 }
266266 ; CHECK-LABEL: .entry ${test_name}_global
267267 ; CHECK: ${instruction} ${reg_ret}, [${global_surf}, ${reg_access}]
268- define void @${test_name}_global(${retty}* %ret, ${access}) {
268+ define ptx_kernel void @${test_name}_global(${retty}* %ret, ${access}) {
269269 %gs = tail call i64 @llvm.nvvm.texsurf.handle.internal.p1i64(i64 addrspace(1)* @${global_surf})
270270 %val = tail call ${retty} @${intrinsic}(i64 %gs, ${access})
271271 store ${retty} %val, ${retty}* %ret
@@ -357,7 +357,7 @@ def gen_sust_tests(target, global_surf):
357357 }
358358 ; CHECK-LABEL: .entry ${test_name}_global
359359 ; CHECK: ${instruction} [${global_surf}, ${reg_access}], ${reg_value}
360- define void @${test_name}_global(${value}, ${access}) {
360+ define ptx_kernel void @${test_name}_global(${value}, ${access}) {
361361 %gs = tail call i64 @llvm.nvvm.texsurf.handle.internal.p1i64(i64 addrspace(1)* @${global_surf})
362362 tail call void @${intrinsic}(i64 %gs, ${access}, ${value})
363363 ret void
@@ -606,7 +606,7 @@ def gen_tex_tests(target, global_tex, global_sampler):
606606 }
607607 ; CHECK-LABEL: .entry ${test_name}_global
608608 ; CHECK: ${instruction} ${ptx_ret}, [${global_tex}, ${ptx_global_sampler} ${ptx_access}]
609- define void @${test_name}_global(${retty}* %ret, ${access}) {
609+ define ptx_kernel void @${test_name}_global(${retty}* %ret, ${access}) {
610610 %gt = tail call i64 @llvm.nvvm.texsurf.handle.internal.p1i64(i64 addrspace(1)* @${global_tex})
611611 ${get_sampler_handle}
612612 %val = tail call ${retty} @${intrinsic}(i64 %gt, ${sampler} ${access})
@@ -790,7 +790,7 @@ def gen_tld4_tests(target, global_tex, global_sampler):
790790 }
791791 ; CHECK-LABEL: .entry ${test_name}_global
792792 ; CHECK: ${instruction} ${ptx_ret}, [${global_tex}, ${ptx_global_sampler} ${ptx_access}]
793- define void @${test_name}_global(${retty}* %ret, ${access}) {
793+ define ptx_kernel void @${test_name}_global(${retty}* %ret, ${access}) {
794794 %gt = tail call i64 @llvm.nvvm.texsurf.handle.internal.p1i64(i64 addrspace(1)* @${global_tex})
795795 ${get_sampler_handle}
796796 %val = tail call ${retty} @${intrinsic}(i64 %gt, ${sampler} ${access})
@@ -1079,4 +1079,4 @@ def verify_llvm_tablegen(path_td, gen_intr):
10791079else :
10801080 items = gen_tests (args .target , args .tests .split ("," ))
10811081 if args .gen_list :
1082- write_gen_list (args .gen_list , args .gen_list_append , items )
1082+ write_gen_list (args .gen_list , args .gen_list_append , items )
0 commit comments